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Diffstat (limited to 'src/arch/arm/miscregs.cc')
| -rw-r--r-- | src/arch/arm/miscregs.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc index 31b3580be..8dd56c791 100644 --- a/src/arch/arm/miscregs.cc +++ b/src/arch/arm/miscregs.cc @@ -4008,6 +4008,9 @@ ISA::initializeMiscRegMetadata() .unimplemented() .warnNotFail(); InitReg(MISCREG_UNKNOWN); + InitReg(MISCREG_IMPDEF_UNIMPL) + .unimplemented() + .warnNotFail(impdefAsNop); // Register mappings for some unimplemented registers: // ESR_EL1 -> DFSR |