1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc
index 13dec0add..fc04ce87d 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/miscregs.cc
@@ -381,6 +381,8 @@ decodeCP15Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2)
                     return MISCREG_PMINTENCLR;
                 }
             }
+        } else if (opc1 == 1) {
+            return MISCREG_L2LATENCY;
         }
         //Reserved for Branch Predictor, Cache and TCM operations
         break;