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-rw-r--r--src/arch/arm/miscregs.hh2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index f99748622..5e5735de7 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -196,6 +196,7 @@ namespace ArmISA
MISCREG_ISR,
MISCREG_FCEIDR,
MISCREG_L2LATENCY,
+ MISCREG_CRN15,
MISCREG_CP15_END,
@@ -249,6 +250,7 @@ namespace ArmISA
"dccmvau",
"nsacr",
"vbar", "mvbar", "isr", "fceidr", "l2latency",
+ "crn15",
"nop", "raz"
};