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-rw-r--r--src/arch/arm/miscregs.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index 779ead7f4..8cfa01345 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -1891,14 +1891,14 @@ namespace ArmISA
// Uses just the scr.ns bit to pre flatten the misc regs. This is useful
// for MCR/MRC instructions
int
- flattenMiscRegNsBanked(MiscRegIndex reg, ThreadContext *tc);
+ snsBankedIndex(MiscRegIndex reg, ThreadContext *tc);
// Flattens a misc reg index using the specified security state. This is
// used for opperations (eg address translations) where the security
// state of the register access may differ from the current state of the
// processor
int
- flattenMiscRegNsBanked(MiscRegIndex reg, ThreadContext *tc, bool ns);
+ snsBankedIndex(MiscRegIndex reg, ThreadContext *tc, bool ns);
// Takes a misc reg index and returns the root reg if its one of a set of
// banked registers