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Diffstat (limited to 'src/arch/arm/miscregs.hh')
| -rw-r--r-- | src/arch/arm/miscregs.hh | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh index ad4f91908..e3e2ca2c2 100644 --- a/src/arch/arm/miscregs.hh +++ b/src/arch/arm/miscregs.hh @@ -201,13 +201,6 @@ namespace ArmISA // integer register to allow renaming. static const uint32_t CondCodesMask = 0xF80F0000; - // These otherwise unused bits of the PC are used to select a mode - // like the J and T bits of the CPSR. - static const Addr PcJBitShift = 33; - static const Addr PcTBitShift = 34; - static const Addr PcModeMask = (ULL(1) << PcJBitShift) | - (ULL(1) << PcTBitShift); - BitUnion32(SCTLR) Bitfield<30> te; // Thumb Exception Enable Bitfield<29> afe; // Access flag enable |