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-rw-r--r--src/arch/arm/miscregs.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index a20fd0c61..8fba5101b 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -529,6 +529,6 @@ namespace ArmISA
Bitfield<31> l2rstDISABLE_monitor;
EndBitUnion(L2CTLR)
-};
+}
#endif // __ARCH_ARM_MISCREGS_HH__