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-rw-r--r--src/arch/arm/miscregs.hh5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index 5e5735de7..1f84fa4ca 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -436,6 +436,11 @@ namespace ArmISA
Bitfield<31,30> or7;
EndBitUnion(NMRR)
+ BitUnion32(CONTEXTIDR)
+ Bitfield<7,0> asid;
+ Bitfield<31,8> procid;
+ EndBitUnion(CONTEXTIDR)
+
BitUnion32(L2CTLR)
Bitfield<2,0> sataRAMLatency;
Bitfield<4,3> reserved_4_3;