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-rw-r--r--src/arch/arm/nativetrace.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/arm/nativetrace.cc b/src/arch/arm/nativetrace.cc
index fcb13fb2a..395232e00 100644
--- a/src/arch/arm/nativetrace.cc
+++ b/src/arch/arm/nativetrace.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010-2011, 2014 ARM Limited
+ * Copyright (c) 2010-2011, 2014, 2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -125,10 +125,10 @@ Trace::ArmNativeTrace::ThreadState::update(ThreadContext *tc)
newState[STATE_CPSR] = cpsr;
changed[STATE_CPSR] = (newState[STATE_CPSR] != oldState[STATE_CPSR]);
- for (int i = 0; i < NumFloatV7ArchRegs; i += 2) {
- newState[STATE_F0 + (i >> 1)] =
- static_cast<uint64_t>(tc->readFloatRegBits(i + 1)) << 32 |
- tc->readFloatRegBits(i);
+ for (int i = 0; i < NumVecV7ArchRegs; i++) {
+ auto vec(tc->readVecReg(RegId(VecRegClass,i)).as<uint64_t, 2>());
+ newState[STATE_F0 + 2*i] = vec[0];
+ newState[STATE_F0 + 2*i + 1] = vec[1];
}
newState[STATE_FPSCR] = tc->readMiscRegNoEffect(MISCREG_FPSCR) |
tc->readCCReg(CCREG_FP);