1 files changed, 78 insertions, 0 deletions
diff --git a/src/arch/arm/pagetable.cc b/src/arch/arm/pagetable.cc
new file mode 100644
index 000000000..aebe7f00a
--- /dev/null
+++ b/src/arch/arm/pagetable.cc
@@ -0,0 +1,78 @@
+/*
+ * Copyright (c) 2002-2005 The Regents of The University of Michigan
+ * Copyright (c) 2007 MIPS Technologies, Inc.
+ * Copyright (c) 2007-2008 The Florida State University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ *          Steve Reinhardt
+ *          Jaidev Patwardhan
+ *          Stephen Hines
+ */
+
+#include "arch/arm/pagetable.hh"
+#include "sim/serialize.hh"
+
+namespace ArmISA
+{
+    void
+    PTE::serialize(std::ostream &os)
+    {
+        SERIALIZE_SCALAR(Mask);
+        SERIALIZE_SCALAR(VPN);
+        SERIALIZE_SCALAR(asid);
+        SERIALIZE_SCALAR(G);
+        SERIALIZE_SCALAR(PFN0);
+        SERIALIZE_SCALAR(D0);
+        SERIALIZE_SCALAR(V0);
+        SERIALIZE_SCALAR(C0);
+        SERIALIZE_SCALAR(PFN1);
+        SERIALIZE_SCALAR(D1);
+        SERIALIZE_SCALAR(V1);
+        SERIALIZE_SCALAR(C1);
+        SERIALIZE_SCALAR(AddrShiftAmount);
+        SERIALIZE_SCALAR(OffsetMask);
+    }
+
+    void
+    PTE::unserialize(Checkpoint *cp, const std::string &section)
+    {
+        UNSERIALIZE_SCALAR(Mask);
+        UNSERIALIZE_SCALAR(VPN);
+        UNSERIALIZE_SCALAR(asid);
+        UNSERIALIZE_SCALAR(G);
+        UNSERIALIZE_SCALAR(PFN0);
+        UNSERIALIZE_SCALAR(D0);
+        UNSERIALIZE_SCALAR(V0);
+        UNSERIALIZE_SCALAR(C0);
+        UNSERIALIZE_SCALAR(PFN1);
+        UNSERIALIZE_SCALAR(D1);
+        UNSERIALIZE_SCALAR(V1);
+        UNSERIALIZE_SCALAR(C1);
+        UNSERIALIZE_SCALAR(AddrShiftAmount);
+        UNSERIALIZE_SCALAR(OffsetMask);
+    }
+}