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Diffstat (limited to 'src/arch/arm/regfile/misc_regfile.hh')
-rw-r--r--src/arch/arm/regfile/misc_regfile.hh7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/arm/regfile/misc_regfile.hh b/src/arch/arm/regfile/misc_regfile.hh
index eda0e8f05..c2b2f39d7 100644
--- a/src/arch/arm/regfile/misc_regfile.hh
+++ b/src/arch/arm/regfile/misc_regfile.hh
@@ -32,6 +32,7 @@
#define __ARCH_ARM_REGFILE_MISC_REGFILE_HH__
#include "arch/arm/isa_traits.hh"
+#include "arch/arm/miscregs.hh"
#include "arch/arm/types.hh"
#include "sim/faults.hh"
@@ -39,6 +40,8 @@ class ThreadContext;
namespace ArmISA
{
+ const int NumMiscRegs = NUM_MISCREGS;
+
static inline std::string getMiscRegName(RegIndex)
{
return "";
@@ -59,22 +62,26 @@ namespace ArmISA
MiscReg readRegNoEffect(int misc_reg)
{
+ assert(misc_reg < NumMiscRegs);
return miscRegFile[misc_reg];
}
MiscReg readReg(int misc_reg, ThreadContext *tc)
{
+ assert(misc_reg < NumMiscRegs);
return miscRegFile[misc_reg];
}
void setRegNoEffect(int misc_reg, const MiscReg &val)
{
+ assert(misc_reg < NumMiscRegs);
miscRegFile[misc_reg] = val;
}
void setReg(int misc_reg, const MiscReg &val,
ThreadContext *tc)
{
+ assert(misc_reg < NumMiscRegs);
miscRegFile[misc_reg] = val;
}