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-rw-r--r--src/arch/arm/regfile/misc_regfile.hh90
-rw-r--r--src/arch/arm/regfile/regfile.cc58
-rw-r--r--src/arch/arm/regfile/regfile.hh102
3 files changed, 0 insertions, 250 deletions
diff --git a/src/arch/arm/regfile/misc_regfile.hh b/src/arch/arm/regfile/misc_regfile.hh
deleted file mode 100644
index e89826956..000000000
--- a/src/arch/arm/regfile/misc_regfile.hh
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2007-2008 The Florida State University
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Stephen Hines
- */
-
-#ifndef __ARCH_ARM_REGFILE_MISC_REGFILE_HH__
-#define __ARCH_ARM_REGFILE_MISC_REGFILE_HH__
-
-#include "arch/arm/isa_traits.hh"
-#include "arch/arm/miscregs.hh"
-#include "arch/arm/types.hh"
-#include "sim/faults.hh"
-
-class ThreadContext;
-
-namespace ArmISA
-{
- const int NumMiscRegs = NUM_MISCREGS;
-
- static inline std::string getMiscRegName(RegIndex)
- {
- return "";
- }
-
- class MiscRegFile {
-
- protected:
- MiscReg miscRegFile[NumMiscRegs];
-
- public:
- void clear()
- {
- // Unknown startup state in misc register file currently
- }
-
- void copyMiscRegs(ThreadContext *tc);
-
- MiscReg readRegNoEffect(int misc_reg)
- {
- assert(misc_reg < NumMiscRegs);
- return miscRegFile[misc_reg];
- }
-
- MiscReg readReg(int misc_reg, ThreadContext *tc)
- {
- assert(misc_reg < NumMiscRegs);
- return miscRegFile[misc_reg];
- }
-
- void setRegNoEffect(int misc_reg, const MiscReg &val)
- {
- assert(misc_reg < NumMiscRegs);
- miscRegFile[misc_reg] = val;
- }
-
- void setReg(int misc_reg, const MiscReg &val,
- ThreadContext *tc)
- {
- assert(misc_reg < NumMiscRegs);
- miscRegFile[misc_reg] = val;
- }
- };
-} // namespace ArmISA
-
-#endif
diff --git a/src/arch/arm/regfile/regfile.cc b/src/arch/arm/regfile/regfile.cc
deleted file mode 100644
index 2d995df93..000000000
--- a/src/arch/arm/regfile/regfile.cc
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (c) 2007-2008 The Florida State University
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Stephen Hines
- */
-
-#include "arch/arm/regfile/regfile.hh"
-#include "base/misc.hh"
-#include "sim/serialize.hh"
-
-using namespace std;
-
-namespace ArmISA
-{
-
-void
-copyRegs(ThreadContext *src, ThreadContext *dest)
-{
- panic("Copy Regs Not Implemented Yet\n");
-}
-
-void
-copyMiscRegs(ThreadContext *src, ThreadContext *dest)
-{
- panic("Copy Misc. Regs Not Implemented Yet\n");
-}
-
-void
-MiscRegFile::copyMiscRegs(ThreadContext *tc)
-{
- panic("Copy Misc. Regs Not Implemented Yet\n");
-}
-
-} // namespace ArmISA
diff --git a/src/arch/arm/regfile/regfile.hh b/src/arch/arm/regfile/regfile.hh
deleted file mode 100644
index c7f23c704..000000000
--- a/src/arch/arm/regfile/regfile.hh
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * Copyright (c) 2007-2008 The Florida State University
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Stephen Hines
- */
-
-#ifndef __ARCH_ARM_REGFILE_REGFILE_HH__
-#define __ARCH_ARM_REGFILE_REGFILE_HH__
-
-#include "arch/arm/types.hh"
-#include "arch/arm/regfile/misc_regfile.hh"
-#include "sim/faults.hh"
-
-class Checkpoint;
-class EventManager;
-class ThreadContext;
-
-namespace ArmISA
-{
- enum FPControlRegNums {
- FIR = NumFloatArchRegs,
- FCCR,
- FEXR,
- FENR,
- FCSR
- };
-
- enum FCSRBits {
- Inexact = 1,
- Underflow,
- Overflow,
- DivideByZero,
- Invalid,
- Unimplemented
- };
-
- enum FCSRFields {
- Flag_Field = 1,
- Enable_Field = 6,
- Cause_Field = 11
- };
-
- enum MiscIntRegNums {
- zero_reg = NumIntArchRegs,
- addr_reg,
-
- rhi,
- rlo,
-
- r8_fiq, /* FIQ mode register bank */
- r9_fiq,
- r10_fiq,
- r11_fiq,
- r12_fiq,
-
- r13_fiq, /* FIQ mode SP and LR */
- r14_fiq,
-
- r13_irq, /* IRQ mode SP and LR */
- r14_irq,
-
- r13_svc, /* SVC mode SP and LR */
- r14_svc,
-
- r13_undef, /* UNDEF mode SP and LR */
- r14_undef,
-
- r13_abt, /* ABT mode SP and LR */
- r14_abt
- };
-
- void copyRegs(ThreadContext *src, ThreadContext *dest);
-
- void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
-
-} // namespace ArmISA
-
-#endif
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