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-rwxr-xr-xsrc/arch/arm/stage2_mmu.cc9
1 files changed, 4 insertions, 5 deletions
diff --git a/src/arch/arm/stage2_mmu.cc b/src/arch/arm/stage2_mmu.cc
index a2ae8cc73..5c28d073e 100755
--- a/src/arch/arm/stage2_mmu.cc
+++ b/src/arch/arm/stage2_mmu.cc
@@ -97,16 +97,15 @@ Stage2MMU::readDataUntimed(ThreadContext *tc, Addr oVAddr, Addr descAddr,
return fault;
}
-Fault
+void
Stage2MMU::readDataTimed(ThreadContext *tc, Addr descAddr,
Stage2Translation *translation, int numBytes,
Request::Flags flags)
{
- Fault fault;
// translate to physical address using the second stage MMU
- translation->setVirt(descAddr, numBytes, flags | Request::PT_WALK, masterId);
- fault = translation->translateTiming(tc);
- return fault;
+ translation->setVirt(
+ descAddr, numBytes, flags | Request::PT_WALK, masterId);
+ translation->translateTiming(tc);
}
Stage2MMU::Stage2Translation::Stage2Translation(Stage2MMU &_parent,