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-rw-r--r--src/arch/arm/system.hh9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index 4898d433c..32b48a85b 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -78,6 +78,15 @@ class ArmSystem : public System
void initState();
+ /** Check if an address should be uncacheable until all caches are enabled.
+ * This exits because coherence on some addresses at boot is maintained via
+ * sw coherence until the caches are enbaled. Since we don't support sw
+ * coherence operations in gem5, this is a method that allows a system
+ * type to designate certain addresses that should remain uncachebale
+ * for a while.
+ */
+ virtual bool adderBootUncacheable(Addr a) { return false; }
+
virtual Addr fixFuncEventAddr(Addr addr)
{
// Remove the low bit that thumb symbols have set