diff options
Diffstat (limited to 'src/arch/arm/tlb.cc')
| -rw-r--r-- | src/arch/arm/tlb.cc | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 6953090d0..b19ad5265 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -418,14 +418,12 @@ TLB::translateSe(RequestPtr req, ThreadContext *tc, Mode mode, } } - if (!FullSystem) { - Addr paddr; - Process *p = tc->getProcessPtr(); + Addr paddr; + Process *p = tc->getProcessPtr(); - if (!p->pTable->translate(vaddr, paddr)) - return Fault(new GenericPageTableFault(vaddr)); - req->setPaddr(paddr); - } + if (!p->pTable->translate(vaddr, paddr)) + return Fault(new GenericPageTableFault(vaddr)); + req->setPaddr(paddr); return NoFault; } @@ -570,11 +568,9 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode, } } - if (FullSystem) { - if (!bootUncacheability && - ((ArmSystem*)tc->getSystemPtr())->adderBootUncacheable(vaddr)) - req->setFlags(Request::UNCACHEABLE); - } + if (!bootUncacheability && + ((ArmSystem*)tc->getSystemPtr())->adderBootUncacheable(vaddr)) + req->setFlags(Request::UNCACHEABLE); switch ( (dacr >> (te->domain * 2)) & 0x3) { case 0: |