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-rw-r--r--src/arch/arm/tlb.cc5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index d2153e779..79eef1b8d 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1145,11 +1145,6 @@ TLB::translateFs(const RequestPtr &req, ThreadContext *tc, Mode mode,
}
if (fault == NoFault) {
- // Generate Illegal Inst Set State fault if IL bit is set in CPSR
- if (aarch64 && is_fetch && cpsr.il == 1) {
- return std::make_shared<IllegalInstSetStateFault>();
- }
-
// Don't try to finalize a physical address unless the
// translation has completed (i.e., there is a table entry).
return te ? finalizePhysical(req, tc, mode) : NoFault;