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-rw-r--r--src/arch/arm/tlb.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 4e98aaf7b..c0ebb52b2 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -376,10 +376,10 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
// If this is a clrex instruction, provide a PA of 0 with no fault
// This will force the monitor to set the tracked address to 0
// a bit of a hack but this effectively clrears this processors monitor
- if (flags & Request::CLREX){
+ if (flags & Request::CLEAR_LL){
req->setPaddr(0);
req->setFlags(Request::UNCACHEABLE);
- req->setFlags(Request::CLREX);
+ req->setFlags(Request::CLEAR_LL);
return NoFault;
}
if ((req->isInstFetch() && (!sctlr.i)) ||