diff options
Diffstat (limited to 'src/arch/arm/tracers')
-rw-r--r-- | src/arch/arm/tracers/tarmac_base.cc | 2 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_base.hh | 8 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_parser.cc | 10 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_parser.hh | 10 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_record.hh | 2 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_record_v8.cc | 4 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_record_v8.hh | 2 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_tracer.cc | 2 | ||||
-rw-r--r-- | src/arch/arm/tracers/tarmac_tracer.hh | 6 |
9 files changed, 23 insertions, 23 deletions
diff --git a/src/arch/arm/tracers/tarmac_base.cc b/src/arch/arm/tracers/tarmac_base.cc index 79e951ab5..3b6201def 100644 --- a/src/arch/arm/tracers/tarmac_base.cc +++ b/src/arch/arm/tracers/tarmac_base.cc @@ -47,7 +47,7 @@ #include "cpu/static_inst.hh" #include "cpu/thread_context.hh" -using namespace TheISA; +using namespace ArmISA; namespace Trace { diff --git a/src/arch/arm/tracers/tarmac_base.hh b/src/arch/arm/tracers/tarmac_base.hh index 7dab87b43..4e6cbe0f3 100644 --- a/src/arch/arm/tracers/tarmac_base.hh +++ b/src/arch/arm/tracers/tarmac_base.hh @@ -85,7 +85,7 @@ class TarmacBaseRecord : public InstRecord { InstEntry() = default; InstEntry(ThreadContext* thread, - TheISA::PCState pc, + ArmISA::PCState pc, const StaticInstPtr staticInst, bool predicate); @@ -101,7 +101,7 @@ class TarmacBaseRecord : public InstRecord struct RegEntry { RegEntry() = default; - RegEntry(TheISA::PCState pc); + RegEntry(ArmISA::PCState pc); RegType type; RegIndex index; @@ -123,7 +123,7 @@ class TarmacBaseRecord : public InstRecord public: TarmacBaseRecord(Tick _when, ThreadContext *_thread, - const StaticInstPtr _staticInst, TheISA::PCState _pc, + const StaticInstPtr _staticInst, ArmISA::PCState _pc, const StaticInstPtr _macroStaticInst = NULL); virtual void dump() = 0; @@ -135,7 +135,7 @@ class TarmacBaseRecord : public InstRecord * @param pc program counter (PCState) variable * @return Instruction Set State for the given PCState */ - static ISetState pcToISetState(TheISA::PCState pc); + static ISetState pcToISetState(ArmISA::PCState pc); }; diff --git a/src/arch/arm/tracers/tarmac_parser.cc b/src/arch/arm/tracers/tarmac_parser.cc index 860bb1b0b..04a2a051e 100644 --- a/src/arch/arm/tracers/tarmac_parser.cc +++ b/src/arch/arm/tracers/tarmac_parser.cc @@ -57,7 +57,7 @@ #include "sim/sim_exit.hh" using namespace std; -using namespace TheISA; +using namespace ArmISA; namespace Trace { @@ -743,7 +743,7 @@ TarmacParserRecord::TarmacParserRecordEvent::description() const void TarmacParserRecord::printMismatchHeader(const StaticInstPtr staticInst, - TheISA::PCState pc) + ArmISA::PCState pc) { ostream &outs = Trace::output(); outs << "\nMismatch between gem5 and TARMAC trace @ " << dec << curTick() @@ -776,8 +776,8 @@ TarmacParserRecord::dump() // By default TARMAC splits memory accesses into 4-byte chunks (see // 'loadstore-display-width' option in TARMAC plugin) uint32_t written_data = 0; - unsigned mem_flags = TheISA::TLB::MustBeOne | 3 | - TheISA::TLB::AllowUnaligned; + unsigned mem_flags = ArmISA::TLB::MustBeOne | 3 | + ArmISA::TLB::AllowUnaligned; ISetState isetstate; @@ -1051,7 +1051,7 @@ TarmacParserRecord::readMemNoEffect(Addr addr, uint8_t *data, unsigned size, unsigned flags) { const RequestPtr &req = memReq; - TheISA::TLB* dtb = static_cast<TLB*>(thread->getDTBPtr()); + ArmISA::TLB* dtb = static_cast<TLB*>(thread->getDTBPtr()); req->setVirt(0, addr, size, flags, thread->pcState().instAddr(), Request::funcMasterId); diff --git a/src/arch/arm/tracers/tarmac_parser.hh b/src/arch/arm/tracers/tarmac_parser.hh index 6acdd627e..afba50fef 100644 --- a/src/arch/arm/tracers/tarmac_parser.hh +++ b/src/arch/arm/tracers/tarmac_parser.hh @@ -83,7 +83,7 @@ class TarmacParserRecord : public TarmacBaseRecord /** Current instruction. */ const StaticInstPtr inst; /** PC of the current instruction. */ - TheISA::PCState pc; + ArmISA::PCState pc; /** True if a mismatch has been detected for this instruction. */ bool mismatch; /** @@ -95,7 +95,7 @@ class TarmacParserRecord : public TarmacBaseRecord TarmacParserRecordEvent(TarmacParser& _parent, ThreadContext *_thread, const StaticInstPtr _inst, - TheISA::PCState _pc, + ArmISA::PCState _pc, bool _mismatch, bool _mismatch_on_pc_or_opcode) : parent(_parent), thread(_thread), inst(_inst), pc(_pc), @@ -130,10 +130,10 @@ class TarmacParserRecord : public TarmacBaseRecord * by gem5. */ static void printMismatchHeader(const StaticInstPtr inst, - TheISA::PCState pc); + ArmISA::PCState pc); TarmacParserRecord(Tick _when, ThreadContext *_thread, - const StaticInstPtr _staticInst, TheISA::PCState _pc, + const StaticInstPtr _staticInst, ArmISA::PCState _pc, TarmacParser& _parent, const StaticInstPtr _macroStaticInst = NULL); @@ -241,7 +241,7 @@ class TarmacParser : public InstTracer InstRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, - TheISA::PCState pc, + ArmISA::PCState pc, const StaticInstPtr macroStaticInst = NULL) { if (!started && pc.pc() == startPc) diff --git a/src/arch/arm/tracers/tarmac_record.hh b/src/arch/arm/tracers/tarmac_record.hh index f54abf56a..d2534732c 100644 --- a/src/arch/arm/tracers/tarmac_record.hh +++ b/src/arch/arm/tracers/tarmac_record.hh @@ -178,7 +178,7 @@ class TarmacTracerRecord : public TarmacBaseRecord public: TarmacTracerRecord(Tick _when, ThreadContext *_thread, - const StaticInstPtr _staticInst, TheISA::PCState _pc, + const StaticInstPtr _staticInst, ArmISA::PCState _pc, TarmacTracer& _tracer, const StaticInstPtr _macroStaticInst = NULL); diff --git a/src/arch/arm/tracers/tarmac_record_v8.cc b/src/arch/arm/tracers/tarmac_record_v8.cc index dea040992..90f1a6fc3 100644 --- a/src/arch/arm/tracers/tarmac_record_v8.cc +++ b/src/arch/arm/tracers/tarmac_record_v8.cc @@ -56,7 +56,7 @@ TarmacTracerRecordV8::TraceInstEntryV8::TraceInstEntryV8( const auto thread = tarmCtx.thread; // Evaluate physical address - TheISA::TLB* dtb = static_cast<TLB*>(thread->getDTBPtr()); + ArmISA::TLB* dtb = static_cast<TLB*>(thread->getDTBPtr()); paddrValid = dtb->translateFunctional(thread, addr, paddr); } @@ -70,7 +70,7 @@ TarmacTracerRecordV8::TraceMemEntryV8::TraceMemEntryV8( const auto thread = tarmCtx.thread; // Evaluate physical address - TheISA::TLB* dtb = static_cast<TLB*>(thread->getDTBPtr()); + ArmISA::TLB* dtb = static_cast<TLB*>(thread->getDTBPtr()); dtb->translateFunctional(thread, addr, paddr); } diff --git a/src/arch/arm/tracers/tarmac_record_v8.hh b/src/arch/arm/tracers/tarmac_record_v8.hh index adf638f99..a727ea6a6 100644 --- a/src/arch/arm/tracers/tarmac_record_v8.hh +++ b/src/arch/arm/tracers/tarmac_record_v8.hh @@ -130,7 +130,7 @@ class TarmacTracerRecordV8 : public TarmacTracerRecord public: TarmacTracerRecordV8(Tick _when, ThreadContext *_thread, - const StaticInstPtr _staticInst, TheISA::PCState _pc, + const StaticInstPtr _staticInst, ArmISA::PCState _pc, TarmacTracer& _parent, const StaticInstPtr _macroStaticInst = NULL) : TarmacTracerRecord(_when, _thread, _staticInst, _pc, diff --git a/src/arch/arm/tracers/tarmac_tracer.cc b/src/arch/arm/tracers/tarmac_tracer.cc index b6f876de5..41e4e49c4 100644 --- a/src/arch/arm/tracers/tarmac_tracer.cc +++ b/src/arch/arm/tracers/tarmac_tracer.cc @@ -75,7 +75,7 @@ TarmacTracer::TarmacTracer(const Params *p) InstRecord * TarmacTracer::getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, - TheISA::PCState pc, + ArmISA::PCState pc, const StaticInstPtr macroStaticInst) { // Check if we need to start tracing since we have passed the diff --git a/src/arch/arm/tracers/tarmac_tracer.hh b/src/arch/arm/tracers/tarmac_tracer.hh index 78739999d..58a47d175 100644 --- a/src/arch/arm/tracers/tarmac_tracer.hh +++ b/src/arch/arm/tracers/tarmac_tracer.hh @@ -63,7 +63,7 @@ class TarmacContext public: TarmacContext(ThreadContext* _thread, const StaticInstPtr _staticInst, - TheISA::PCState _pc) + ArmISA::PCState _pc) : thread(_thread), staticInst(_staticInst), pc(_pc) {} @@ -72,7 +72,7 @@ class TarmacContext public: ThreadContext* thread; const StaticInstPtr staticInst; - TheISA::PCState pc; + ArmISA::PCState pc; }; /** @@ -99,7 +99,7 @@ class TarmacTracer : public InstTracer */ InstRecord* getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, - TheISA::PCState pc, + ArmISA::PCState pc, const StaticInstPtr macroStaticInst = NULL); protected: |