1 files changed, 44 insertions, 3 deletions

diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 8cfa48e18..afff97d31 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -1,6 +1,37 @@
+/*
+ * Copyright (c) 2009 ARM Limited
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Ali Saidi
+ */
 
-#include <arch/arm/utility.hh>
-#include <cpu/thread_context.hh>
+
+#include "arch/arm/faults.hh"
+#include "arch/arm/utility.hh"
+#include "cpu/thread_context.hh"
 
 
 namespace ArmISA {
@@ -12,8 +43,18 @@ initCPU(ThreadContext *tc, int cpuId)
     
     // FPEXC.EN = 0
     
-    static Fault reset = new Reset();
+    static Fault reset = new Reset;
     if (cpuId == 0)
         reset->invoke(tc);
 }
 
+uint64_t getArgument(ThreadContext *tc, int number, bool fp) {
+#if FULL_SYSTEM
+    panic("getArgument() not implemented for ARM!\n");
+#else
+    panic("getArgument() only implemented for FULL_SYSTEM\n");
+    M5_DUMMY_RETURN
+#endif
+}
+
+}