diff options
Diffstat (limited to 'src/arch/arm')
| -rw-r--r-- | src/arch/arm/table_walker.cc | 2 | ||||
| -rw-r--r-- | src/arch/arm/tlb.cc | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc index 9755299ff..d419fdec5 100644 --- a/src/arch/arm/table_walker.cc +++ b/src/arch/arm/table_walker.cc @@ -308,6 +308,7 @@ TableWalker::processWalk() f = currState->fault; } else { RequestPtr req = new Request(l1desc_addr, sizeof(uint32_t), flag, masterId); + req->taskId(ContextSwitchTaskId::DMA); PacketPtr pkt = new Packet(req, MemCmd::ReadReq); pkt->dataStatic((uint8_t*)&currState->l1Desc.data); port.sendFunctional(pkt); @@ -653,6 +654,7 @@ TableWalker::doL1Descriptor() } else { RequestPtr req = new Request(l2desc_addr, sizeof(uint32_t), 0, masterId); + req->taskId(ContextSwitchTaskId::DMA); PacketPtr pkt = new Packet(req, MemCmd::ReadReq); pkt->dataStatic((uint8_t*)&currState->l2Desc.data); port.sendFunctional(pkt); diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 107901f99..805898576 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -54,6 +54,7 @@ #include "base/inifile.hh" #include "base/str.hh" #include "base/trace.hh" +#include "cpu/base.hh" #include "cpu/thread_context.hh" #include "debug/Checkpoint.hh" #include "debug/TLB.hh" @@ -477,6 +478,8 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode, if (is_priv) req->setFlags(Request::PRIVILEGED); + req->taskId(tc->getCpuPtr()->taskId()); + DPRINTF(TLBVerbose, "CPSR is priv:%d UserMode:%d\n", isPriv, flags & UserMode); // If this is a clrex instruction, provide a PA of 0 with no fault |