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-rw-r--r--src/arch/arm/isa.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 117873450..2b67e6cf6 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010-2012 ARM Limited
+ * Copyright (c) 2010-2013 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -238,7 +238,7 @@ ISA::readMiscReg(int misc_reg, ThreadContext *tc)
//all caches have the same line size in gem5
//4 byte words in ARM
unsigned lineSizeWords =
- tc->getCpuPtr()->getInstPort().peerBlockSize() / 4;
+ tc->getSystemPtr()->cacheLineSize() / 4;
unsigned log2LineSizeWords = 0;
while (lineSizeWords >>= 1) {