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-rw-r--r--src/arch/arm/insts/macromem.cc10
-rw-r--r--src/arch/arm/isa/templates/mem.isa15
2 files changed, 22 insertions, 3 deletions
diff --git a/src/arch/arm/insts/macromem.cc b/src/arch/arm/insts/macromem.cc
index cd77d6d5f..2ada29539 100644
--- a/src/arch/arm/insts/macromem.cc
+++ b/src/arch/arm/insts/macromem.cc
@@ -171,6 +171,16 @@ MacroMemOp::MacroMemOp(const char *mnem, ExtMachInst machInst,
(*uop)->setLastMicroop();
+ /* Take the control flags from the last microop for the macroop */
+ if ((*uop)->isControl())
+ setFlag(StaticInst::IsControl);
+ if ((*uop)->isCondCtrl())
+ setFlag(StaticInst::IsCondControl);
+ if ((*uop)->isIndirectCtrl())
+ setFlag(StaticInst::IsIndirectControl);
+ if ((*uop)->isReturn())
+ setFlag(StaticInst::IsReturn);
+
for (StaticInstPtr *curUop = microOps;
!(*curUop)->isLastMicroop(); curUop++) {
MicroOp * uopPtr = dynamic_cast<MicroOp *>(curUop->get());
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index 6199c0920..f1d1523f4 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -1214,12 +1214,21 @@ def template LoadImmConstructor {{
uops[2] = new MicroUopRegMov(machInst, INTREG_PC, INTREG_UREG0);
uops[2]->setFlag(StaticInst::IsControl);
uops[2]->setFlag(StaticInst::IsIndirectControl);
- if (conditional)
+ /* Also set flags on the macroop so that pre-microop decomposition
+ branch prediction can work */
+ setFlag(StaticInst::IsControl);
+ setFlag(StaticInst::IsIndirectControl);
+ if (conditional) {
uops[2]->setFlag(StaticInst::IsCondControl);
- else
+ setFlag(StaticInst::IsCondControl);
+ } else {
uops[2]->setFlag(StaticInst::IsUncondControl);
- if (_base == INTREG_SP && _add && _imm == 4 && %(is_ras_pop)s)
+ setFlag(StaticInst::IsUncondControl);
+ }
+ if (_base == INTREG_SP && _add && _imm == 4 && %(is_ras_pop)s) {
uops[2]->setFlag(StaticInst::IsReturn);
+ setFlag(StaticInst::IsReturn);
+ }
uops[2]->setLastMicroop();
} else {
uops[0] = new %(acc_name)s(machInst, _dest, _base, _add, _imm);