3 files changed, 7 insertions, 6 deletions
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index ab4c67552..6e7c92cf6 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -567,7 +567,8 @@ class IllegalInstSetStateFault : public ArmFaultVals<IllegalInstSetStateFault>
 };
 
 /*
- * Explicitly declare template static member variables avoid warnings in some clang versions
+ * Explicitly declare template static member variables to avoid warnings
+ * in some clang versions
  */
 template<> ArmFault::FaultVals ArmFaultVals<Reset>::vals;
 template<> ArmFault::FaultVals ArmFaultVals<UndefinedInstruction>::vals;
diff --git a/src/arch/arm/insts/vfp.hh b/src/arch/arm/insts/vfp.hh
index de0c62161..caa22376e 100644
--- a/src/arch/arm/insts/vfp.hh
+++ b/src/arch/arm/insts/vfp.hh
@@ -201,7 +201,7 @@ bitsToFp(uint64_t bits, double junk)
 }
 
 template <class fpType>
-static bool
+static inline bool
 isSnan(fpType val)
 {
     const bool single = (sizeof(fpType) == sizeof(float));
diff --git a/src/arch/arm/isa/insts/fp.isa b/src/arch/arm/isa/insts/fp.isa
index 0f10a05af..dc2f30701 100644
--- a/src/arch/arm/isa/insts/fp.isa
+++ b/src/arch/arm/isa/insts/fp.isa
@@ -65,7 +65,7 @@ class VfpMacroRegRegOp : public VfpMacroOp
 };
 
 template <class VfpOp>
-static StaticInstPtr
+StaticInstPtr
 decodeVfpRegRegOp(ExtMachInst machInst,
         IntRegIndex dest, IntRegIndex op1, bool wide)
 {
@@ -101,7 +101,7 @@ class VfpMacroRegImmOp : public VfpMacroOp
 };
 
 template <class VfpOp>
-static StaticInstPtr
+StaticInstPtr
 decodeVfpRegImmOp(ExtMachInst machInst,
         IntRegIndex dest, uint64_t imm, bool wide)
 {
@@ -137,7 +137,7 @@ class VfpMacroRegRegImmOp : public VfpMacroOp
 };
 
 template <class VfpOp>
-static StaticInstPtr
+StaticInstPtr
 decodeVfpRegRegImmOp(ExtMachInst machInst, IntRegIndex dest,
                      IntRegIndex op1, uint64_t imm, bool wide)
 {
@@ -173,7 +173,7 @@ class VfpMacroRegRegRegOp : public VfpMacroOp
 };
 
 template <class VfpOp>
-static StaticInstPtr
+StaticInstPtr
 decodeVfpRegRegRegOp(ExtMachInst machInst, IntRegIndex dest,
                      IntRegIndex op1, IntRegIndex op2, bool wide)
 {