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-rw-r--r--src/arch/arm/faults.cc24
-rw-r--r--src/arch/arm/faults.hh46
-rw-r--r--src/arch/arm/stacktrace.cc2
-rw-r--r--src/arch/arm/stacktrace.hh6
-rw-r--r--src/arch/arm/utility.hh2
5 files changed, 40 insertions, 40 deletions
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index 94a82b9d5..9d373e469 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -426,7 +426,7 @@ ArmFault::setSyndrome(ThreadContext *tc, MiscRegIndex syndrome_reg)
}
void
-ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+ArmFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
@@ -587,7 +587,7 @@ ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst)
}
void
-ArmFault::invoke64(ThreadContext *tc, StaticInstPtr inst)
+ArmFault::invoke64(ThreadContext *tc, const StaticInstPtr &inst)
{
// Determine actual misc. register indices for ELR_ELx and SPSR_ELx
MiscRegIndex elr_idx, spsr_idx;
@@ -678,7 +678,7 @@ ArmFault::invoke64(ThreadContext *tc, StaticInstPtr inst)
}
void
-Reset::invoke(ThreadContext *tc, StaticInstPtr inst)
+Reset::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
if (FullSystem) {
tc->getCpuPtr()->clearInterrupts();
@@ -706,7 +706,7 @@ Reset::invoke(ThreadContext *tc, StaticInstPtr inst)
}
void
-UndefinedInstruction::invoke(ThreadContext *tc, StaticInstPtr inst)
+UndefinedInstruction::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
if (FullSystem) {
ArmFault::invoke(tc, inst);
@@ -767,7 +767,7 @@ UndefinedInstruction::iss() const
}
void
-SupervisorCall::invoke(ThreadContext *tc, StaticInstPtr inst)
+SupervisorCall::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
if (FullSystem) {
ArmFault::invoke(tc, inst);
@@ -884,7 +884,7 @@ ArmFaultVals<T>::offset(ThreadContext *tc)
// }
void
-SecureMonitorCall::invoke(ThreadContext *tc, StaticInstPtr inst)
+SecureMonitorCall::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
if (FullSystem) {
ArmFault::invoke(tc, inst);
@@ -913,7 +913,7 @@ SecureMonitorTrap::ec(ThreadContext *tc) const
template<class T>
void
-AbortFault<T>::invoke(ThreadContext *tc, StaticInstPtr inst)
+AbortFault<T>::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
if (tranMethod == ArmFault::UnknownTran) {
tranMethod = longDescFormatInUse(tc) ? ArmFault::LpaeTran
@@ -1237,7 +1237,7 @@ DataAbort::annotate(AnnotationIDs id, uint64_t val)
}
void
-VirtualDataAbort::invoke(ThreadContext *tc, StaticInstPtr inst)
+VirtualDataAbort::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
AbortFault<VirtualDataAbort>::invoke(tc, inst);
HCR hcr = tc->readMiscRegNoEffect(MISCREG_HCR);
@@ -1336,7 +1336,7 @@ VirtualFastInterrupt::VirtualFastInterrupt()
{}
void
-PCAlignmentFault::invoke(ThreadContext *tc, StaticInstPtr inst)
+PCAlignmentFault::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
ArmFaultVals<PCAlignmentFault>::invoke(tc, inst);
assert(from64);
@@ -1351,7 +1351,7 @@ SystemError::SystemError()
{}
void
-SystemError::invoke(ThreadContext *tc, StaticInstPtr inst)
+SystemError::invoke(ThreadContext *tc, const StaticInstPtr &inst)
{
tc->getCpuPtr()->clearInterrupt(INT_ABT, 0);
ArmFault::invoke(tc, inst);
@@ -1382,7 +1382,7 @@ SystemError::routeToHyp(ThreadContext *tc) const
}
void
-FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) {
+FlushPipe::invoke(ThreadContext *tc, const StaticInstPtr &inst) {
DPRINTF(Faults, "Invoking FlushPipe Fault\n");
// Set the PC to the next instruction of the faulting instruction.
@@ -1395,7 +1395,7 @@ FlushPipe::invoke(ThreadContext *tc, StaticInstPtr inst) {
}
void
-ArmSev::invoke(ThreadContext *tc, StaticInstPtr inst) {
+ArmSev::invoke(ThreadContext *tc, const StaticInstPtr &inst) {
DPRINTF(Faults, "Invoking ArmSev Fault\n");
if (!FullSystem)
return;
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index 8a6f07dde..4980c12e1 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -181,10 +181,10 @@ class ArmFault : public FaultBase
// exception level
MiscRegIndex getFaultAddrReg64() const;
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
- void invoke64(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
+ void invoke64(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
virtual void annotate(AnnotationIDs id, uint64_t val) {}
virtual FaultStat& countStat() = 0;
virtual FaultOffset offset(ThreadContext *tc) = 0;
@@ -249,8 +249,8 @@ class ArmFaultVals : public ArmFault
class Reset : public ArmFaultVals<Reset>
{
public:
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
};
class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
@@ -277,8 +277,8 @@ class UndefinedInstruction : public ArmFaultVals<UndefinedInstruction>
mnemonic(_mnemonic)
{}
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
bool routeToHyp(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const;
uint32_t iss() const;
@@ -295,8 +295,8 @@ class SupervisorCall : public ArmFaultVals<SupervisorCall>
overrideEc(_overrideEc)
{}
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
bool routeToHyp(ThreadContext *tc) const;
ExceptionClass ec(ThreadContext *tc) const;
uint32_t iss() const;
@@ -309,8 +309,8 @@ class SecureMonitorCall : public ArmFaultVals<SecureMonitorCall>
ArmFaultVals<SecureMonitorCall>(_machInst)
{}
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
ExceptionClass ec(ThreadContext *tc) const;
uint32_t iss() const;
};
@@ -401,8 +401,8 @@ class AbortFault : public ArmFaultVals<T>
stage2(_stage2), s1ptw(false), tranMethod(_tranMethod)
{}
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
FSR getFsr(ThreadContext *tc);
bool abortDisable(ThreadContext *tc);
@@ -473,7 +473,7 @@ class VirtualDataAbort : public AbortFault<VirtualDataAbort>
AbortFault<VirtualDataAbort>(_addr, _write, _domain, _source, false)
{}
- void invoke(ThreadContext *tc, StaticInstPtr inst);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst);
};
class Interrupt : public ArmFaultVals<Interrupt>
@@ -514,8 +514,8 @@ class PCAlignmentFault : public ArmFaultVals<PCAlignmentFault>
public:
PCAlignmentFault(Addr _faultPC) : faultPC(_faultPC)
{}
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
};
/// Stack pointer alignment fault (AArch64 only)
@@ -530,8 +530,8 @@ class SystemError : public ArmFaultVals<SystemError>
{
public:
SystemError();
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
bool routeToMonitor(ThreadContext *tc) const;
bool routeToHyp(ThreadContext *tc) const;
};
@@ -541,8 +541,8 @@ class FlushPipe : public ArmFaultVals<FlushPipe>
{
public:
FlushPipe() {}
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
};
// A fault that flushes the pipe, excluding the faulting instructions
@@ -550,8 +550,8 @@ class ArmSev : public ArmFaultVals<ArmSev>
{
public:
ArmSev () {}
- void invoke(ThreadContext *tc,
- StaticInstPtr inst = StaticInst::nullStaticInstPtr);
+ void invoke(ThreadContext *tc, const StaticInstPtr &inst =
+ StaticInst::nullStaticInstPtr);
};
/// Illegal Instruction Set State fault (AArch64 only)
diff --git a/src/arch/arm/stacktrace.cc b/src/arch/arm/stacktrace.cc
index 8575e1347..7cc650c58 100644
--- a/src/arch/arm/stacktrace.cc
+++ b/src/arch/arm/stacktrace.cc
@@ -121,7 +121,7 @@ namespace ArmISA
{
}
- StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
+ StackTrace::StackTrace(ThreadContext *_tc, const StaticInstPtr &inst)
: tc(0), stack(64)
{
trace(_tc, inst);
diff --git a/src/arch/arm/stacktrace.hh b/src/arch/arm/stacktrace.hh
index f88ed352b..b0a4a8adc 100644
--- a/src/arch/arm/stacktrace.hh
+++ b/src/arch/arm/stacktrace.hh
@@ -78,7 +78,7 @@ class StackTrace
public:
StackTrace();
- StackTrace(ThreadContext *tc, StaticInstPtr inst);
+ StackTrace(ThreadContext *tc, const StaticInstPtr &inst);
~StackTrace();
void clear()
@@ -88,7 +88,7 @@ class StackTrace
}
bool valid() const { return tc != NULL; }
- bool trace(ThreadContext *tc, StaticInstPtr inst);
+ bool trace(ThreadContext *tc, const StaticInstPtr &inst);
public:
const std::vector<Addr> &getstack() const { return stack; }
@@ -106,7 +106,7 @@ class StackTrace
};
inline bool
-StackTrace::trace(ThreadContext *tc, StaticInstPtr inst)
+StackTrace::trace(ThreadContext *tc, const StaticInstPtr &inst)
{
if (!inst->isCall() && !inst->isReturn())
return false;
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 2318f1aa9..0c29ac90e 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -279,7 +279,7 @@ uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
void skipFunction(ThreadContext *tc);
inline void
-advancePC(PCState &pc, const StaticInstPtr inst)
+advancePC(PCState &pc, const StaticInstPtr &inst)
{
inst->advancePC(pc);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-16 08:50:53 +0000