4 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/arm/ArmInterrupts.py b/src/arch/arm/ArmInterrupts.py
index f21d49e95..68a58958d 100644
--- a/src/arch/arm/ArmInterrupts.py
+++ b/src/arch/arm/ArmInterrupts.py
@@ -31,3 +31,4 @@ from m5.SimObject import SimObject
 class ArmInterrupts(SimObject):
     type = 'ArmInterrupts'
     cxx_class = 'ArmISA::Interrupts'
+    cxx_header = "arch/arm/interrupts.hh"
diff --git a/src/arch/arm/ArmNativeTrace.py b/src/arch/arm/ArmNativeTrace.py
index 0a76913e3..91da1ed76 100644
--- a/src/arch/arm/ArmNativeTrace.py
+++ b/src/arch/arm/ArmNativeTrace.py
@@ -33,5 +33,6 @@ from NativeTrace import NativeTrace
 class ArmNativeTrace(NativeTrace):
     type = 'ArmNativeTrace'
     cxx_class = 'Trace::ArmNativeTrace'
+    cxx_header = "arch/arm/nativetrace.hh"
     stop_on_pc_error = Param.Bool(True,
             "Stop M5 if it and statetrace's pcs are different")
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index 3ca9b8573..ce363865c 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -48,6 +48,7 @@ class ArmMachineType(Enum):
 
 class ArmSystem(System):
     type = 'ArmSystem'
+    cxx_header = "arch/arm/system.hh"
     load_addr_mask = 0xffffffff
     # 0x35 Implementor is '5' from "M5"
     # 0x0 Variant
@@ -62,6 +63,7 @@ class ArmSystem(System):
 
 class LinuxArmSystem(ArmSystem):
     type = 'LinuxArmSystem'
+    cxx_header = "arch/arm/linux/system.hh"
     load_addr_mask = 0x0fffffff
     machine_type = Param.ArmMachineType('RealView_PBX',
         "Machine id from http://www.arm.linux.org.uk/developer/machines/")
diff --git a/src/arch/arm/ArmTLB.py b/src/arch/arm/ArmTLB.py
index 0a931b7e5..c70dd80c8 100644
--- a/src/arch/arm/ArmTLB.py
+++ b/src/arch/arm/ArmTLB.py
@@ -45,6 +45,7 @@ from MemObject import MemObject
 class ArmTableWalker(MemObject):
     type = 'ArmTableWalker'
     cxx_class = 'ArmISA::TableWalker'
+    cxx_header = "arch/arm/table_walker.hh"
     port = MasterPort("Port for TableWalker to do walk the translation with")
     sys = Param.System(Parent.any, "system object parameter")
     num_squash_per_cycle = Param.Unsigned(2,
@@ -53,5 +54,6 @@ class ArmTableWalker(MemObject):
 class ArmTLB(SimObject):
     type = 'ArmTLB'
     cxx_class = 'ArmISA::TLB'
+    cxx_header = "arch/arm/tlb.hh"
     size = Param.Int(64, "TLB size")
     walker = Param.ArmTableWalker(ArmTableWalker(), "HW Table walker")