diff options
Diffstat (limited to 'src/arch/arm')
-rw-r--r-- | src/arch/arm/isa/formats/misc.isa | 6 | ||||
-rw-r--r-- | src/arch/arm/miscregs.hh | 11 |
2 files changed, 12 insertions, 5 deletions
diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index 7d58350a4..8d386b0b0 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -122,6 +122,12 @@ def format McrMrc15() {{ case MISCREG_BPIMVA: return new WarnUnimplemented( isRead ? "mrc bpimva" : "mcr bpimva", machInst); + case MISCREG_BPIALLIS: + return new WarnUnimplemented( + isRead ? "mrc bpiallis" : "mcr bpiallis", machInst); + case MISCREG_BPIALL: + return new WarnUnimplemented( + isRead ? "mrc bpiall" : "mcr bpiall", machInst); default: if (isRead) { return new Mrc15(machInst, rt, (IntRegIndex)miscReg); diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh index 49b015984..a43bb2fe5 100644 --- a/src/arch/arm/miscregs.hh +++ b/src/arch/arm/miscregs.hh @@ -100,6 +100,8 @@ namespace ArmISA MISCREG_ICIALLU, MISCREG_ICIMVAU, MISCREG_BPIMVA, + MISCREG_BPIALLIS, + MISCREG_BPIALL, MISCREG_CP15_UNIMP_START, MISCREG_CTR = MISCREG_CP15_UNIMP_START, MISCREG_TCMTR, @@ -135,8 +137,6 @@ namespace ArmISA MISCREG_DRACR, MISCREG_IRACR, MISCREG_RGNR, - MISCREG_BPIALLIS, - MISCREG_BPIALL, MISCREG_DCIMVAC, MISCREG_DCISW, MISCREG_MCCSW, @@ -162,7 +162,8 @@ namespace ArmISA "contextidr", "tpidrurw", "tpidruro", "tpidrprw", "cp15isb", "cp15dsb", "cp15dmb", "cpacr", "clidr", "ccsidr", "csselr", - "icialluis", "iciallu", "icimvau", "bpimva", + "icialluis", "iciallu", "icimvau", + "bpimva", "bpiallis", "bpiall", "ctr", "tcmtr", "mpuir", "mpidr", "midr", "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0", "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3", @@ -170,8 +171,8 @@ namespace ArmISA "aidr", "actlr", "dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar", "drbar", "irbar", "drsr", "irsr", "dracr", "iracr", - "rgnr", "bpiallis", - "bpiall", "dcimvac", "dcisw", "mccsw", + "rgnr", + "dcimvac", "dcisw", "mccsw", "dccmvau", "nop", "raz" }; |