diff options
Diffstat (limited to 'src/arch/arm')
| -rw-r--r-- | src/arch/arm/isa/insts/branch.isa | 11 | ||||
| -rw-r--r-- | src/arch/arm/isa/templates/branch.isa | 6 |
2 files changed, 12 insertions, 5 deletions
diff --git a/src/arch/arm/isa/insts/branch.isa b/src/arch/arm/isa/insts/branch.isa index 3ee9d88e4..47fd4e805 100644 --- a/src/arch/arm/isa/insts/branch.isa +++ b/src/arch/arm/isa/insts/branch.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010-2012 ARM Limited +// Copyright (c) 2010-2012, 2014 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -174,12 +174,15 @@ let {{ #CBNZ, CBZ. These are always unconditional as far as predicates for (mnem, test) in (("cbz", "=="), ("cbnz", "!=")): code = 'NPC = (uint32_t)(PC + imm);\n' + br_tgt_code = '''pcs.instNPC((uint32_t)(branchPC.instPC() + imm));''' predTest = "Op1 %(test)s 0" % {"test": test} iop = InstObjParams(mnem, mnem.capitalize(), "BranchImmReg", - {"code": code, "predicate_test": predTest}, - ["IsIndirectControl"]) + {"code": code, "predicate_test": predTest, + "brTgtCode" : br_tgt_code}, + ["IsDirectControl"]) header_output += BranchImmRegDeclare.subst(iop) - decoder_output += BranchImmRegConstructor.subst(iop) + decoder_output += BranchImmRegConstructor.subst(iop) + \ + BranchTarget.subst(iop) exec_output += PredOpExecute.subst(iop) #TBB, TBH diff --git a/src/arch/arm/isa/templates/branch.isa b/src/arch/arm/isa/templates/branch.isa index c8efdb7a6..92c566726 100644 --- a/src/arch/arm/isa/templates/branch.isa +++ b/src/arch/arm/isa/templates/branch.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010 ARM Limited +// Copyright (c) 2010, 2014 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -212,6 +212,10 @@ class %(class_name)s : public %(base_class)s %(class_name)s(ExtMachInst machInst, int32_t imm, IntRegIndex _op1); %(BasicExecDeclare)s + ArmISA::PCState branchTarget(const ArmISA::PCState &branchPC) const; + + /// Explicitly import the otherwise hidden branchTarget + using StaticInst::branchTarget; }; }}; |