summaryrefslogtreecommitdiff
path: root/src/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/isa/decoder/arm.isa5
-rw-r--r--src/arch/arm/isa/insts/macromem.isa4
2 files changed, 5 insertions, 4 deletions
diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa
index d84a6a5dc..9e54eb253 100644
--- a/src/arch/arm/isa/decoder/arm.isa
+++ b/src/arch/arm/isa/decoder/arm.isa
@@ -189,10 +189,7 @@ format DataOp {
1: ArmBlBlxImm::armBlBlxImm();
}
0x6: decode CPNUM {
- 0xb: decode LOADOP {
- 0x0: WarnUnimpl::fstmx();
- 0x1: WarnUnimpl::fldmx();
- }
+ 0xb: ExtensionRegLoadStore::extensionRegLoadStore();
}
0x7: decode OPCODE_24 {
0: decode OPCODE_4 {
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index 0a593cf00..3a080625f 100644
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -141,4 +141,8 @@ let {{
iop = InstObjParams("ldmstm", "LdmStm", 'MacroMemOp', "", [])
header_output = MacroMemDeclare.subst(iop)
decoder_output = MacroMemConstructor.subst(iop)
+
+ vfpIop = InstObjParams("vldmstm", "VLdmStm", 'MacroVFPMemOp', "", [])
+ header_output += MacroVFPMemDeclare.subst(vfpIop)
+ decoder_output += MacroVFPMemConstructor.subst(vfpIop)
}};