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Diffstat (limited to 'src/arch/generic')
-rw-r--r-- | src/arch/generic/locked_mem.hh | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/src/arch/generic/locked_mem.hh b/src/arch/generic/locked_mem.hh new file mode 100644 index 000000000..68a4ff540 --- /dev/null +++ b/src/arch/generic/locked_mem.hh @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2017 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Copyright (c) 2006 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Steve Reinhardt + */ + +#ifndef __ARCH_GENERIC_LOCKED_MEM_HH__ +#define __ARCH_GENERIC_LOCKED_MEM_HH__ + +/** + * @file + * + * Generic helper functions for locked memory accesses. + */ + +#include "config/the_isa.hh" +#include "mem/packet.hh" +#include "mem/request.hh" + +namespace TheISA +{ +template <class XC> +inline void +handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask) +{ +} + +template <class XC> +inline void +handleLockedRead(XC *xc, Request *req) +{ +} + +template <class XC> +inline void +handleLockedSnoopHit(XC *xc) +{ +} + + +template <class XC> +inline bool +handleLockedWrite(XC *xc, Request *req, Addr cacheBlockMask) +{ + return true; +} + +template <class XC> +inline void +globalClearExclusive(XC *xc) +{ +} + +} // namespace Generic ISA + +#endif |