summaryrefslogtreecommitdiff
path: root/src/arch/hsail/insts/decl.hh
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/hsail/insts/decl.hh')
-rw-r--r--src/arch/hsail/insts/decl.hh12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/hsail/insts/decl.hh b/src/arch/hsail/insts/decl.hh
index e2da501b9..90609c365 100644
--- a/src/arch/hsail/insts/decl.hh
+++ b/src/arch/hsail/insts/decl.hh
@@ -189,7 +189,7 @@ namespace HsailISA
int numSrcRegOperands() {
int operands = 0;
for (int i = 0; i < NumSrcOperands; i++) {
- if (src[i].isVectorRegister() == true) {
+ if (src[i].isVectorRegister()) {
operands++;
}
}
@@ -325,13 +325,13 @@ namespace HsailISA
int numSrcRegOperands() {
int operands = 0;
- if (src0.isVectorRegister() == true) {
+ if (src0.isVectorRegister()) {
operands++;
}
- if (src1.isVectorRegister() == true) {
+ if (src1.isVectorRegister()) {
operands++;
}
- if (src2.isVectorRegister() == true) {
+ if (src2.isVectorRegister()) {
operands++;
}
return operands;
@@ -485,10 +485,10 @@ namespace HsailISA
int numSrcRegOperands() {
int operands = 0;
- if (src0.isVectorRegister() == true) {
+ if (src0.isVectorRegister()) {
operands++;
}
- if (src1.isVectorRegister() == true) {
+ if (src1.isVectorRegister()) {
operands++;
}
return operands;