summaryrefslogtreecommitdiff
path: root/src/arch/mips/MipsTLB.py
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/mips/MipsTLB.py')
-rw-r--r--src/arch/mips/MipsTLB.py20
1 files changed, 2 insertions, 18 deletions
diff --git a/src/arch/mips/MipsTLB.py b/src/arch/mips/MipsTLB.py
index 41d46c572..16cbe6879 100644
--- a/src/arch/mips/MipsTLB.py
+++ b/src/arch/mips/MipsTLB.py
@@ -36,21 +36,5 @@ from BaseTLB import BaseTLB
class MipsTLB(BaseTLB):
type = 'MipsTLB'
- abstract = True
- size = Param.Int("TLB size")
-
-class MipsDTB(MipsTLB):
- type = 'MipsDTB'
- cxx_class = 'MipsISA::DTB'
- size = 64
-
-class MipsITB(MipsTLB):
- type = 'MipsITB'
- cxx_class = 'MipsISA::ITB'
- size = 64
-
-class MipsUTB(MipsTLB):
- type = 'MipsUTB'
- cxx_class = 'MipsISA::UTB'
- size = 64
-
+ cxx_class = 'MipsISA::TLB'
+ size = Param.Int(64, "TLB size")