diff options
Diffstat (limited to 'src/arch/mips/faults.hh')
| -rw-r--r-- | src/arch/mips/faults.hh | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/mips/faults.hh b/src/arch/mips/faults.hh index 912b42cde..98638ac9a 100644 --- a/src/arch/mips/faults.hh +++ b/src/arch/mips/faults.hh @@ -40,6 +40,7 @@ #include "cpu/thread_context.hh" #include "debug/MipsPRA.hh" #include "sim/faults.hh" +#include "sim/full_system.hh" namespace MipsISA { @@ -165,7 +166,7 @@ class CoprocessorUnusableFault : public MipsFault<CoprocessorUnusableFault> StaticInstPtr inst = StaticInst::nullStaticInstPtr) { MipsFault<CoprocessorUnusableFault>::invoke(tc, inst); - if (FULL_SYSTEM) { + if (FullSystem) { CauseReg cause = tc->readMiscReg(MISCREG_CAUSE); cause.ce = coProcID; tc->setMiscRegNoEffect(MISCREG_CAUSE, cause); @@ -200,7 +201,7 @@ class AddressFault : public MipsFault<T> StaticInstPtr inst = StaticInst::nullStaticInstPtr) { MipsFault<T>::invoke(tc, inst); - if (FULL_SYSTEM) + if (FullSystem) tc->setMiscRegNoEffect(MISCREG_BADVADDR, vaddr); } }; @@ -252,7 +253,7 @@ class TlbFault : public AddressFault<T> invoke(ThreadContext * tc, StaticInstPtr inst = StaticInst::nullStaticInstPtr) { - if (FULL_SYSTEM) { + if (FullSystem) { DPRINTF(MipsPRA, "Fault %s encountered.\n", this->name()); Addr vect = this->vect(tc); setTlbExceptionState(tc, this->code()); |