1 files changed, 54 insertions, 0 deletions
diff --git a/src/arch/mips/idle_event.cc b/src/arch/mips/idle_event.cc
new file mode 100644
index 000000000..4744414a5
--- /dev/null
+++ b/src/arch/mips/idle_event.cc
@@ -0,0 +1,54 @@
+/*
+ * Copyright .AN) 2007 MIPS Technologies, Inc.  All Rights Reserved
+ *
+ * This software is part of the M5 simulator.
+ *
+ * THIS IS A LEGAL AGREEMENT.  BY DOWNLOADING, USING, COPYING, CREATING
+ * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
+ * TO THESE TERMS AND CONDITIONS.
+ *
+ * Permission is granted to use, copy, create derivative works and
+ * distribute this software and such derivative works for any purpose,
+ * so long as (1) the copyright notice above, this grant of permission,
+ * and the disclaimer below appear in all copies and derivative works
+ * made, (2) the copyright notice above is augmented as appropriate to
+ * reflect the addition of any new copyrightable work in a derivative
+ * work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
+ * the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
+ * advertising or publicity pertaining to the use or distribution of
+ * this software without specific, written prior authorization.
+ *
+ * THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B  MIPS MAKES NO WARRANTIES AND
+ * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
+ * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
+ * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
+ * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
+ * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
+ * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
+ * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
+ * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
+ * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
+ * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
+ *
+ * Authors: Lisa R. Hsu
+ *          Nathan L. Binkert
+ *          Korey L. Sewell
+ */
+
+#include "arch/mips/idle_event.hh"
+#include "arch/mips/kernel_stats.hh"
+#include "cpu/thread_context.hh"
+
+using namespace TheISA;
+
+void
+IdleStartEvent::process(ThreadContext *tc)
+{
+    fatal("Idle Start Event Not Defined for MIPS ISA ");
+
+    //    if (tc->getKernelStats())
+    //      tc->getKernelStats()->setIdleProcess(
+    //      tc->readMiscRegNoEffect(MipsISA::IPR_PALtemp23), tc);
+    //remove();
+}