summaryrefslogtreecommitdiff
path: root/src/arch/mips/isa/bitfields.isa
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/mips/isa/bitfields.isa')
-rw-r--r--src/arch/mips/isa/bitfields.isa66
1 files changed, 38 insertions, 28 deletions
diff --git a/src/arch/mips/isa/bitfields.isa b/src/arch/mips/isa/bitfields.isa
index 87be5ad13..9352e80bf 100644
--- a/src/arch/mips/isa/bitfields.isa
+++ b/src/arch/mips/isa/bitfields.isa
@@ -1,34 +1,41 @@
// -*- mode:c++ -*-
-// Copyright (c) 2006 The Regents of The University of Michigan
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met: redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer;
-// redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution;
-// neither the name of the copyright holders nor the names of its
-// contributors may be used to endorse or promote products derived from
-// this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Korey Sewell
+// Copyright .AN) 2007 MIPS Technologies, Inc. All Rights Reserved
+
+// This software is part of the M5 simulator.
+
+// THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
+// DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
+// TO THESE TERMS AND CONDITIONS.
+
+// Permission is granted to use, copy, create derivative works and
+// distribute this software and such derivative works for any purpose,
+// so long as (1) the copyright notice above, this grant of permission,
+// and the disclaimer below appear in all copies and derivative works
+// made, (2) the copyright notice above is augmented as appropriate to
+// reflect the addition of any new copyrightable work in a derivative
+// work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
+// the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
+// advertising or publicity pertaining to the use or distribution of
+// this software without specific, written prior authorization.
+
+// THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B MIPS MAKES NO WARRANTIES AND
+// DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
+// OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
+// NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
+// IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
+// INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
+// ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
+// THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
+// IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
+// STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
+// POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
+
+//Authors: Korey L. Sewell
+// Jaidev Patwardhan
+
-//@TODO: Make sure the naming convention is consistent here.
////////////////////////////////////////////////////////////////////
//
// Bitfield definitions.
@@ -119,3 +126,6 @@ def bitfield BP <12:11>;
def bitfield POS <10: 6>;
def bitfield MT_U <5:5>;
def bitfield MT_H <4:4>;
+
+//Cache Ops
+def bitfield CACHE_OP <20:16>;