diff options
Diffstat (limited to 'src/arch/mips/isa/formats/dsp.isa')
| -rwxr-xr-x | src/arch/mips/isa/formats/dsp.isa | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/arch/mips/isa/formats/dsp.isa b/src/arch/mips/isa/formats/dsp.isa index 2a946ed9d..78fb93063 100755 --- a/src/arch/mips/isa/formats/dsp.isa +++ b/src/arch/mips/isa/formats/dsp.isa @@ -64,7 +64,8 @@ output header {{ // Dsp instruction class execute method template. def template DspExecute {{ - Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const + Fault %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -97,7 +98,8 @@ def template DspExecute {{ // DspHiLo instruction class execute method template. def template DspHiLoExecute {{ - Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const + Fault %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -136,9 +138,9 @@ def template DspHiLoExecute {{ }}; output header {{ - bool isDspEnabled(%(CPU_exec_context)s *xc); + bool isDspEnabled(ExecContext *xc); - bool isDspPresent(%(CPU_exec_context)s *xc); + bool isDspPresent(ExecContext *xc); }}; //Outputs to decoder.cc @@ -147,7 +149,7 @@ output decoder {{ output exec {{ bool - isDspEnabled(CPU_EXEC_CONTEXT *xc) + isDspEnabled(ExecContext *xc) { return !FullSystem || bits(xc->readMiscReg(MISCREG_STATUS), 24); } @@ -155,7 +157,7 @@ output exec {{ output exec {{ bool - isDspPresent(CPU_EXEC_CONTEXT *xc) + isDspPresent(ExecContext *xc) { return !FullSystem || bits(xc->readMiscReg(MISCREG_CONFIG3), 10); } |