diff options
Diffstat (limited to 'src/arch/mips/isa/formats/mem.isa')
| -rw-r--r-- | src/arch/mips/isa/formats/mem.isa | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa index 3e7a8de5a..80107be8b 100644 --- a/src/arch/mips/isa/formats/mem.isa +++ b/src/arch/mips/isa/formats/mem.isa @@ -105,7 +105,7 @@ output exec {{ /** return data in cases where there the size of data is only known in the packet */ - uint64_t getMemData(%(CPU_exec_context)s *xc, Packet *packet) { + uint64_t getMemData(CPU_EXEC_CONTEXT *xc, Packet *packet) { switch (packet->getSize()) { case 1: @@ -176,7 +176,7 @@ def template LoadStoreConstructor {{ def template EACompExecute {{ Fault - %(class_name)s::eaComp(%(CPU_exec_context)s *xc, + %(class_name)s::eaComp(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -203,7 +203,7 @@ def template EACompExecute {{ }}; def template LoadExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -235,7 +235,7 @@ def template LoadExecute {{ def template LoadInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -262,7 +262,7 @@ def template LoadInitiateAcc {{ def template LoadCompleteAcc {{ Fault %(class_name)s::completeAcc(Packet *pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -292,7 +292,7 @@ def template LoadCompleteAcc {{ }}; def template StoreExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -326,7 +326,7 @@ def template StoreExecute {{ def template StoreFPExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -361,7 +361,7 @@ def template StoreFPExecute {{ }}; def template StoreCondExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -395,7 +395,7 @@ def template StoreCondExecute {{ }}; def template StoreInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA; @@ -422,7 +422,7 @@ def template StoreInitiateAcc {{ def template StoreCompleteAcc {{ Fault %(class_name)s::completeAcc(Packet *pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { return NoFault; @@ -431,7 +431,7 @@ def template StoreCompleteAcc {{ def template StoreCondCompleteAcc {{ Fault %(class_name)s::completeAcc(Packet *pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -454,7 +454,7 @@ def template StoreCondCompleteAcc {{ }}; def template MiscExecute {{ - Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, + Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { Addr EA M5_VAR_USED = 0; @@ -474,7 +474,7 @@ def template MiscExecute {{ }}; def template MiscInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, + Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { panic("Misc instruction does not support split access method!"); @@ -485,7 +485,7 @@ def template MiscInitiateAcc {{ def template MiscCompleteAcc {{ Fault %(class_name)s::completeAcc(Packet *pkt, - %(CPU_exec_context)s *xc, + CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const { panic("Misc instruction does not support split access method!"); |