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-rw-r--r--src/arch/mips/isa/decoder.isa39
-rw-r--r--src/arch/mips/isa/formats/int.isa7
-rw-r--r--src/arch/mips/isa/formats/mem.isa20
-rw-r--r--src/arch/mips/isa/formats/util.isa74
4 files changed, 54 insertions, 86 deletions
diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa
index d65e3eb94..12f36c449 100644
--- a/src/arch/mips/isa/decoder.isa
+++ b/src/arch/mips/isa/decoder.isa
@@ -154,19 +154,20 @@ decode OPCODE_HI default Unknown::unknown() {
0x3: decode FUNCTION_LO {
format HiLoOp {
- 0x0: mult({{ val = Rs.sd * Rt.sd; }});
- 0x1: multu({{ val = Rs.ud * Rt.ud; }});
- }
-
- format HiLoMiscOp {
- 0x2: div({{ if (Rt.sd != 0) {
- HI = Rs.sd % Rt.sd;
- LO = Rs.sd / Rt.sd;
+ 0x0: mult({{ int64_t val = Rs.sd * Rt.sd; }});
+ 0x1: multu({{ uint64_t val = Rs.ud * Rt.ud; }});
+ 0x2: div({{ int64_t val;
+ if (Rt.sd != 0) {
+ int64_t hi = Rs.sd % Rt.sd;
+ int64_t lo = Rs.sd / Rt.sd;
+ val = (hi << 32) | lo;
}
}});
- 0x3: divu({{ if (Rt.ud != 0) {
- HI = Rs.ud % Rt.ud;
- LO = Rs.ud / Rt.ud;
+ 0x3: divu({{ uint64_t val;
+ if (Rt.ud != 0) {
+ uint64_t hi = Rs.ud % Rt.ud;
+ uint64_t lo = Rs.ud / Rt.ud;
+ val = (hi << 32) | lo;
}
}});
}
@@ -950,17 +951,17 @@ decode OPCODE_HI default Unknown::unknown() {
}});
format HiLoOp {
- 0x0: madd({{ val = ((int64_t) HI << 32 | LO) +
- (Rs.sd * Rt.sd);
+ 0x0: madd({{ int64_t val = ((int64_t) HI << 32 | LO) +
+ (Rs.sd * Rt.sd);
}});
- 0x1: maddu({{ val = ((uint64_t) HI << 32 | LO) +
- (Rs.ud * Rt.ud);
+ 0x1: maddu({{ uint64_t val = ((uint64_t) HI << 32 | LO) +
+ (Rs.ud * Rt.ud);
}});
- 0x4: msub({{ val = ((int64_t) HI << 32 | LO) -
- (Rs.sd * Rt.sd);
+ 0x4: msub({{ int64_t val = ((int64_t) HI << 32 | LO) -
+ (Rs.sd * Rt.sd);
}});
- 0x5: msubu({{ val = ((uint64_t) HI << 32 | LO) -
- (Rs.ud * Rt.ud);
+ 0x5: msubu({{ uint64_t val = ((uint64_t) HI << 32 | LO) -
+ (Rs.ud * Rt.ud);
}});
}
}
diff --git a/src/arch/mips/isa/formats/int.isa b/src/arch/mips/isa/formats/int.isa
index e9b096f56..2f131f6d9 100644
--- a/src/arch/mips/isa/formats/int.isa
+++ b/src/arch/mips/isa/formats/int.isa
@@ -240,11 +240,6 @@ def format IntImmOp(code, *opt_flags) {{
}};
def format HiLoOp(code, *opt_flags) {{
- if '.sd' in code:
- code = 'int64_t ' + code
- elif '.ud' in code:
- code = 'uint64_t ' + code
-
code += 'HI = val<63:32>;\n'
code += 'LO = val<31:0>;\n'
@@ -260,7 +255,7 @@ def format HiLoMiscOp(code, *opt_flags) {{
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
- exec_output = HiLoExecute.subst(iop)
+ exec_output = BasicExecute.subst(iop)
}};
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index e786cfbe2..fccda2775 100644
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -166,22 +166,28 @@ def template CompleteAccDeclare {{
}};
-def template LoadStoreConstructor {{
+def template EACompConstructor {{
/** TODO: change op_class to AddrGenOp or something (requires
* creating new member of OpClass enum in op_class.hh, updating
* config files, etc.). */
inline %(class_name)s::EAComp::EAComp(MachInst machInst)
: %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp)
{
- %(ea_constructor)s;
+ %(constructor)s;
}
+}};
+
+def template MemAccConstructor {{
inline %(class_name)s::MemAcc::MemAcc(MachInst machInst)
: %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s)
{
- %(memacc_constructor)s;
+ %(constructor)s;
}
+}};
+
+def template LoadStoreConstructor {{
inline %(class_name)s::%(class_name)s(MachInst machInst)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
new EAComp(machInst), new MemAcc(machInst))
@@ -202,7 +208,7 @@ def template EACompExecute {{
%(fp_enable_check)s;
%(op_decl)s;
%(op_rd)s;
- %(code)s;
+ %(ea_code)s;
if (fault == NoFault) {
%(op_wb)s;
@@ -228,7 +234,7 @@ def template LoadMemAccExecute {{
if (fault == NoFault) {
fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
- %(code)s;
+ %(memacc_code)s;
}
if (fault == NoFault) {
@@ -327,7 +333,7 @@ def template StoreMemAccExecute {{
EA = xc->getEA();
if (fault == NoFault) {
- %(code)s;
+ %(memacc_code)s;
}
if (fault == NoFault) {
@@ -471,7 +477,7 @@ def template MiscMemAccExecute {{
EA = xc->getEA();
if (fault == NoFault) {
- %(code)s;
+ %(memacc_code)s;
}
return NoFault;
diff --git a/src/arch/mips/isa/formats/util.isa b/src/arch/mips/isa/formats/util.isa
index 73164bc0d..ec524113d 100644
--- a/src/arch/mips/isa/formats/util.isa
+++ b/src/arch/mips/isa/formats/util.isa
@@ -40,63 +40,24 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
# add hook to get effective addresses into execution trace output.
ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
- # generate code block objects
- ea_cblk = CodeBlock(ea_code)
- memacc_cblk = CodeBlock(memacc_code)
- postacc_cblk = CodeBlock(postacc_code)
-
# Some CPU models execute the memory operation as an atomic unit,
# while others want to separate them into an effective address
# computation and a memory access operation. As a result, we need
# to generate three StaticInst objects. Note that the latter two
# are nested inside the larger "atomic" one.
- # generate InstObjParams for EAComp object
- ea_iop = InstObjParams(name, Name, base_class, ea_cblk, inst_flags)
-
- # generate InstObjParams for MemAcc object
- memacc_iop = InstObjParams(name, Name, base_class, memacc_cblk, inst_flags)
- # in the split execution model, the MemAcc portion is responsible
- # for the post-access code.
- memacc_iop.postacc_code = postacc_cblk.code
-
- # generate InstObjParams for InitiateAcc, CompleteAcc object
- # The code used depends on the template being used
- if (exec_template_base == 'Load'):
- initiateacc_cblk = CodeBlock(ea_code + memacc_code)
- completeacc_cblk = CodeBlock(memacc_code + postacc_code)
- elif (exec_template_base.startswith('Store')):
- initiateacc_cblk = CodeBlock(ea_code + memacc_code)
- completeacc_cblk = CodeBlock(postacc_code)
- else:
- initiateacc_cblk = ''
- completeacc_cblk = ''
-
- initiateacc_iop = InstObjParams(name, Name, base_class, initiateacc_cblk,
- inst_flags)
-
- completeacc_iop = InstObjParams(name, Name, base_class, completeacc_cblk,
- inst_flags)
-
- if (exec_template_base == 'Load'):
- initiateacc_iop.ea_code = ea_cblk.code
- initiateacc_iop.memacc_code = memacc_cblk.code
- completeacc_iop.memacc_code = memacc_cblk.code
- completeacc_iop.postacc_code = postacc_cblk.code
- elif (exec_template_base.startswith('Store')):
- initiateacc_iop.ea_code = ea_cblk.code
- initiateacc_iop.memacc_code = memacc_cblk.code
- completeacc_iop.postacc_code = postacc_cblk.code
-
- # generate InstObjParams for unified execution
- cblk = CodeBlock(ea_code + memacc_code + postacc_code)
- iop = InstObjParams(name, Name, base_class, cblk, inst_flags)
-
- iop.ea_constructor = ea_cblk.constructor
- iop.ea_code = ea_cblk.code
- iop.memacc_constructor = memacc_cblk.constructor
- iop.memacc_code = memacc_cblk.code
- iop.postacc_code = postacc_cblk.code
+ # Generate InstObjParams for each of the three objects. Note that
+ # they differ only in the set of code objects contained (which in
+ # turn affects the object's overall operand list).
+ iop = InstObjParams(name, Name, base_class,
+ { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
+ inst_flags)
+ ea_iop = InstObjParams(name, Name, base_class,
+ { 'ea_code':ea_code },
+ inst_flags)
+ memacc_iop = InstObjParams(name, Name, base_class,
+ { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
+ inst_flags)
if mem_flags:
s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
@@ -117,14 +78,19 @@ def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
# (header_output, decoder_output, decode_block, exec_output)
- return (LoadStoreDeclare.subst(iop), LoadStoreConstructor.subst(iop),
+ return (LoadStoreDeclare.subst(iop),
+ EACompConstructor.subst(ea_iop)
+ + MemAccConstructor.subst(memacc_iop)
+ + LoadStoreConstructor.subst(iop),
decode_template.subst(iop),
EACompExecute.subst(ea_iop)
+ memAccExecTemplate.subst(memacc_iop)
+ fullExecTemplate.subst(iop)
- + initiateAccTemplate.subst(initiateacc_iop)
- + completeAccTemplate.subst(completeacc_iop))
+ + initiateAccTemplate.subst(iop)
+ + completeAccTemplate.subst(iop))
}};
+
+
output header {{
std::string inst2string(MachInst machInst);
}};
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-04 02:37:26 +0000