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-rwxr-xr-xsrc/arch/mips/pagetable.hh8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/mips/pagetable.hh b/src/arch/mips/pagetable.hh
index 992d6649b..cc4e4a859 100755
--- a/src/arch/mips/pagetable.hh
+++ b/src/arch/mips/pagetable.hh
@@ -74,8 +74,8 @@ struct PTE
int OffsetMask;
bool Valid() { return (V0 | V1); };
- void serialize(std::ostream &os);
- void unserialize(Checkpoint *cp, const std::string &section);
+ void serialize(CheckpointOut &cp) const;
+ void unserialize(CheckpointIn &cp);
};
// WARN: This particular TLB entry is not necessarily conformed to MIPS ISA
@@ -100,12 +100,12 @@ struct TlbEntry
void
updateVaddr(Addr new_vaddr) {}
- void serialize(std::ostream &os)
+ void serialize(CheckpointOut &cp) const
{
SERIALIZE_SCALAR(_pageStart);
}
- void unserialize(Checkpoint *cp, const std::string &section)
+ void unserialize(CheckpointIn &cp)
{
UNSERIALIZE_SCALAR(_pageStart);
}