1 files changed, 6 insertions, 6 deletions

diff --git a/src/arch/mips/regfile/regfile.cc b/src/arch/mips/regfile/regfile.cc
index a1c8eab6a..975fad963 100644
--- a/src/arch/mips/regfile/regfile.cc
+++ b/src/arch/mips/regfile/regfile.cc
@@ -46,7 +46,8 @@ RegFile::clear()
 }
 
 void
-RegFile::reset(std::string core_name, unsigned num_threads, unsigned num_vpes, BaseCPU *_cpu)
+RegFile::reset(std::string core_name, ThreadID num_threads, unsigned num_vpes,
+               BaseCPU *_cpu)
 {
     bzero(&intRegFile, sizeof(intRegFile));
     bzero(&floatRegFile, sizeof(floatRegFile));
@@ -66,27 +67,26 @@ RegFile::setIntReg(int intReg, const IntReg &val)
 }
 
 MiscReg
-RegFile::readMiscRegNoEffect(int miscReg, unsigned tid)
+RegFile::readMiscRegNoEffect(int miscReg, ThreadID tid)
 {
     return miscRegFile.readRegNoEffect(miscReg, tid);
 }
 
 MiscReg
-RegFile::readMiscReg(int miscReg, ThreadContext *tc,
-                    unsigned tid)
+RegFile::readMiscReg(int miscReg, ThreadContext *tc, ThreadID tid)
 {
     return miscRegFile.readReg(miscReg, tc, tid);
 }
 
 void
-RegFile::setMiscRegNoEffect(int miscReg, const MiscReg &val, unsigned tid)
+RegFile::setMiscRegNoEffect(int miscReg, const MiscReg &val, ThreadID tid)
 {
     miscRegFile.setRegNoEffect(miscReg, val, tid);
 }
 
 void
 RegFile::setMiscReg(int miscReg, const MiscReg &val,
-                ThreadContext * tc, unsigned tid)
+                    ThreadContext *tc, ThreadID tid)
 {
     miscRegFile.setReg(miscReg, val, tc, tid);
 }