diff options
Diffstat (limited to 'src/arch/mips/regfile')
-rw-r--r-- | src/arch/mips/regfile/float_regfile.cc | 80 | ||||
-rw-r--r-- | src/arch/mips/regfile/float_regfile.hh | 94 | ||||
-rw-r--r-- | src/arch/mips/regfile/regfile.cc | 28 | ||||
-rw-r--r-- | src/arch/mips/regfile/regfile.hh | 35 |
4 files changed, 26 insertions, 211 deletions
diff --git a/src/arch/mips/regfile/float_regfile.cc b/src/arch/mips/regfile/float_regfile.cc deleted file mode 100644 index 884c59cc0..000000000 --- a/src/arch/mips/regfile/float_regfile.cc +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright (c) 2003-2005 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - * Korey Sewell - */ - -#include "arch/mips/regfile/float_regfile.hh" -#include "sim/serialize.hh" - -using namespace MipsISA; -using namespace std; - -void -FloatRegFile::clear() -{ - bzero(regs.q, sizeof(regs.q)); -} - -FloatReg -FloatRegFile::readReg(int floatReg) -{ - return regs.s[floatReg]; -} - -FloatRegBits -FloatRegFile::readRegBits(int floatReg) -{ - return regs.q[floatReg]; -} - -Fault -FloatRegFile::setReg(int floatReg, const FloatReg &val) -{ - regs.s[floatReg] = val; - return NoFault; -} - -Fault -FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val) -{ - regs.q[floatReg] = val; - return NoFault; -} - -void -FloatRegFile::serialize(std::ostream &os) -{ - SERIALIZE_ARRAY(regs.q, NumFloatRegs); -} - -void -FloatRegFile::unserialize(Checkpoint *cp, const std::string §ion) -{ - UNSERIALIZE_ARRAY(regs.q, NumFloatRegs); -} diff --git a/src/arch/mips/regfile/float_regfile.hh b/src/arch/mips/regfile/float_regfile.hh deleted file mode 100644 index 5a641887c..000000000 --- a/src/arch/mips/regfile/float_regfile.hh +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2006 The Regents of The University of Michigan - * Copyright (c) 2007 MIPS Technologies, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Korey Sewell - */ - -#ifndef __ARCH_MIPS_REGFILE_FLOAT_REGFILE_HH__ -#define __ARCH_MIPS_REGFILE_FLOAT_REGFILE_HH__ - -#include "arch/mips/types.hh" -#include "arch/mips/isa_traits.hh" -#include "base/misc.hh" -#include "base/bitfield.hh" -#include "sim/faults.hh" - -#include <string> - -class Checkpoint; - -namespace MipsISA -{ - const uint32_t MIPS32_QNAN = 0x7fbfffff; - const uint64_t MIPS64_QNAN = ULL(0x7fbfffffffffffff); - - enum FPControlRegNums { - FIR = NumFloatArchRegs, - FCCR, - FEXR, - FENR, - FCSR - }; - - enum FCSRBits { - Inexact = 1, - Underflow, - Overflow, - DivideByZero, - Invalid, - Unimplemented - }; - - enum FCSRFields { - Flag_Field = 1, - Enable_Field = 6, - Cause_Field = 11 - }; - - class FloatRegFile - { - protected: - union { - FloatReg s[NumFloatRegs]; - FloatRegBits q[NumFloatRegs]; - } regs; - - public: - void clear(); - FloatReg readReg(int floatReg); - FloatRegBits readRegBits(int floatReg); - Fault setReg(int floatReg, const FloatReg &val); - Fault setRegBits(int floatReg, const FloatRegBits &val); - - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); - }; - -} // namespace MipsISA - -#endif diff --git a/src/arch/mips/regfile/regfile.cc b/src/arch/mips/regfile/regfile.cc index e7ba5a2ca..eeec02ee4 100644 --- a/src/arch/mips/regfile/regfile.cc +++ b/src/arch/mips/regfile/regfile.cc @@ -41,7 +41,6 @@ void RegFile::clear() { intRegFile.clear(); - floatRegFile.clear(); } void @@ -49,7 +48,6 @@ RegFile::reset(std::string core_name, ThreadID num_threads, unsigned num_vpes, BaseCPU *_cpu) { bzero(&intRegFile, sizeof(intRegFile)); - bzero(&floatRegFile, sizeof(floatRegFile)); } IntReg @@ -64,30 +62,6 @@ RegFile::setIntReg(int intReg, const IntReg &val) return intRegFile.setReg(intReg, val); } -FloatReg -RegFile::readFloatReg(int floatReg) -{ - return floatRegFile.readReg(floatReg); -} - -FloatRegBits -RegFile::readFloatRegBits(int floatReg) -{ - return floatRegFile.readRegBits(floatReg); -} - -Fault -RegFile::setFloatReg(int floatReg, const FloatReg &val) -{ - return floatRegFile.setReg(floatReg, val); -} - -Fault -RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val) -{ - return floatRegFile.setRegBits(floatReg, val); -} - void RegFile::setShadowSet(int css){ intRegFile.setShadowSet(css); @@ -134,7 +108,6 @@ void RegFile::serialize(EventManager *em, std::ostream &os) { intRegFile.serialize(os); - //SERIALIZE_ARRAY(floatRegFile, NumFloatRegs); SERIALIZE_SCALAR(pc); SERIALIZE_SCALAR(npc); SERIALIZE_SCALAR(nnpc); @@ -145,7 +118,6 @@ RegFile::unserialize(EventManager *em, Checkpoint *cp, const std::string §ion) { intRegFile.unserialize(cp, section); - //UNSERIALIZE_ARRAY(floatRegFile); UNSERIALIZE_SCALAR(pc); UNSERIALIZE_SCALAR(npc); UNSERIALIZE_SCALAR(nnpc); diff --git a/src/arch/mips/regfile/regfile.hh b/src/arch/mips/regfile/regfile.hh index 55b22638b..105891bb9 100644 --- a/src/arch/mips/regfile/regfile.hh +++ b/src/arch/mips/regfile/regfile.hh @@ -36,7 +36,6 @@ #include "arch/mips/isa_traits.hh" //#include "arch/mips/mt.hh" #include "arch/mips/regfile/int_regfile.hh" -#include "arch/mips/regfile/float_regfile.hh" //#include "cpu/base.hh" #include "sim/faults.hh" @@ -46,6 +45,32 @@ class EventManager; namespace MipsISA { + const uint32_t MIPS32_QNAN = 0x7fbfffff; + const uint64_t MIPS64_QNAN = ULL(0x7fbfffffffffffff); + + enum FPControlRegNums { + FIR = NumFloatArchRegs, + FCCR, + FEXR, + FENR, + FCSR + }; + + enum FCSRBits { + Inexact = 1, + Underflow, + Overflow, + DivideByZero, + Invalid, + Unimplemented + }; + + enum FCSRFields { + Flag_Field = 1, + Enable_Field = 6, + Cause_Field = 11 + }; + class RegFile { protected: Addr pc; // program counter @@ -55,7 +80,6 @@ namespace MipsISA // not real register IntRegFile intRegFile; // (signed) integer register file - FloatRegFile floatRegFile; // floating point register file public: void clear(); @@ -65,13 +89,6 @@ namespace MipsISA IntReg readIntReg(int intReg); Fault setIntReg(int intReg, const IntReg &val); - - FloatReg readFloatReg(int floatReg); - FloatRegBits readFloatRegBits(int floatReg); - Fault setFloatReg(int floatReg, const FloatReg &val); - Fault setFloatRegBits(int floatReg, const FloatRegBits &val); - - void setShadowSet(int css); public: |