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Diffstat (limited to 'src/arch/mips/vtophys.cc')
-rwxr-xr-x | src/arch/mips/vtophys.cc | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/src/arch/mips/vtophys.cc b/src/arch/mips/vtophys.cc new file mode 100755 index 000000000..72769aac1 --- /dev/null +++ b/src/arch/mips/vtophys.cc @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2002-2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Nathan Binkert + * Steve Reinhardt + * Ali Saidi + */ + +#include <string> + +#include "arch/mips/vtophys.hh" +#include "base/chunk_generator.hh" +#include "base/trace.hh" +#include "cpu/thread_context.hh" +#include "mem/vport.hh" +using namespace std; +using namespace MipsISA; + +Addr +MipsISA::vtophys(Addr vaddr) +{ + Addr paddr = 0; + if (MipsISA::IsUSeg(vaddr)) + DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr); + else if (MipsISA::IsKSeg0(vaddr)) + paddr = MipsISA::KSeg02Phys(vaddr); + else if(MipsISA::IsKSeg1(vaddr)) + paddr = MipsISA::KSeg12Phys(vaddr); + else + panic("vtophys: ptbr is not set on virtual lookup for vaddr %#x", vaddr); + + DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr); + + return paddr; +} + +Addr +MipsISA::vtophys(ThreadContext *tc, Addr addr) +{ + + fatal("VTOPHYS: Unimplemented on MIPS\n"); +} + |