diff options
Diffstat (limited to 'src/arch/mips')
-rw-r--r-- | src/arch/mips/faults.cc | 34 | ||||
-rw-r--r-- | src/arch/mips/faults.hh | 76 | ||||
-rw-r--r-- | src/arch/mips/isa.hh | 2 | ||||
-rw-r--r-- | src/arch/mips/tlb.hh | 2 | ||||
-rw-r--r-- | src/arch/mips/utility.cc | 2 |
5 files changed, 72 insertions, 44 deletions
diff --git a/src/arch/mips/faults.cc b/src/arch/mips/faults.cc index 68ee86455..9bb945dba 100644 --- a/src/arch/mips/faults.cc +++ b/src/arch/mips/faults.cc @@ -217,7 +217,7 @@ MipsFault::setExceptionState(ThreadContext *tc, uint8_t excCode) } void -ArithmeticFault::invoke(ThreadContext *tc) +ArithmeticFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); setExceptionState(tc, 0xC); @@ -237,7 +237,7 @@ ArithmeticFault::invoke(ThreadContext *tc) } void -StoreAddressErrorFault::invoke(ThreadContext *tc) +StoreAddressErrorFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); setExceptionState(tc, 0x5); @@ -251,7 +251,7 @@ StoreAddressErrorFault::invoke(ThreadContext *tc) } void -TrapFault::invoke(ThreadContext *tc) +TrapFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); setExceptionState(tc, 0xD); @@ -264,7 +264,7 @@ TrapFault::invoke(ThreadContext *tc) } void -BreakpointFault::invoke(ThreadContext *tc) +BreakpointFault::invoke(ThreadContext *tc, StaticInstPtr inst) { setExceptionState(tc, 0x9); @@ -276,7 +276,7 @@ BreakpointFault::invoke(ThreadContext *tc) } void -DtbInvalidFault::invoke(ThreadContext *tc) +DtbInvalidFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); @@ -301,7 +301,7 @@ DtbInvalidFault::invoke(ThreadContext *tc) } void -AddressErrorFault::invoke(ThreadContext *tc) +AddressErrorFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); setExceptionState(tc, 0x4); @@ -315,7 +315,7 @@ AddressErrorFault::invoke(ThreadContext *tc) } void -ItbInvalidFault::invoke(ThreadContext *tc) +ItbInvalidFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); setExceptionState(tc, 0x2); @@ -341,7 +341,7 @@ ItbInvalidFault::invoke(ThreadContext *tc) } void -ItbRefillFault::invoke(ThreadContext *tc) +ItbRefillFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered (%x).\n", name(), MISCREG_BADVADDR); Addr HandlerBase; @@ -371,7 +371,7 @@ ItbRefillFault::invoke(ThreadContext *tc) } void -DtbRefillFault::invoke(ThreadContext *tc) +DtbRefillFault::invoke(ThreadContext *tc, StaticInstPtr inst) { // Set new PC DPRINTF(MipsPRA, "%s encountered.\n", name()); @@ -404,7 +404,7 @@ DtbRefillFault::invoke(ThreadContext *tc) } void -TLBModifiedFault::invoke(ThreadContext *tc) +TLBModifiedFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); tc->setMiscRegNoEffect(MISCREG_BADVADDR, badVAddr); @@ -428,7 +428,7 @@ TLBModifiedFault::invoke(ThreadContext *tc) } void -SystemCallFault::invoke(ThreadContext *tc) +SystemCallFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); setExceptionState(tc, 0x8); @@ -441,7 +441,7 @@ SystemCallFault::invoke(ThreadContext *tc) } void -InterruptFault::invoke(ThreadContext *tc) +InterruptFault::invoke(ThreadContext *tc, StaticInstPtr inst) { #if FULL_SYSTEM DPRINTF(MipsPRA, "%s encountered.\n", name()); @@ -464,7 +464,7 @@ InterruptFault::invoke(ThreadContext *tc) #endif // FULL_SYSTEM void -ResetFault::invoke(ThreadContext *tc) +ResetFault::invoke(ThreadContext *tc, StaticInstPtr inst) { #if FULL_SYSTEM DPRINTF(MipsPRA, "%s encountered.\n", name()); @@ -482,7 +482,7 @@ ResetFault::invoke(ThreadContext *tc) } void -ReservedInstructionFault::invoke(ThreadContext *tc) +ReservedInstructionFault::invoke(ThreadContext *tc, StaticInstPtr inst) { #if FULL_SYSTEM DPRINTF(MipsPRA, "%s encountered.\n", name()); @@ -497,21 +497,21 @@ ReservedInstructionFault::invoke(ThreadContext *tc) } void -ThreadFault::invoke(ThreadContext *tc) +ThreadFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); panic("%s encountered.\n", name()); } void -DspStateDisabledFault::invoke(ThreadContext *tc) +DspStateDisabledFault::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(MipsPRA, "%s encountered.\n", name()); panic("%s encountered.\n", name()); } void -CoprocessorUnusableFault::invoke(ThreadContext *tc) +CoprocessorUnusableFault::invoke(ThreadContext *tc, StaticInstPtr inst) { #if FULL_SYSTEM DPRINTF(MipsPRA, "%s encountered.\n", name()); diff --git a/src/arch/mips/faults.hh b/src/arch/mips/faults.hh index 7a001d390..083aa5939 100644 --- a/src/arch/mips/faults.hh +++ b/src/arch/mips/faults.hh @@ -53,7 +53,9 @@ class MipsFault : public FaultBase Addr entryHiVPN2X; Addr contextBadVPN2; #if FULL_SYSTEM - void invoke(ThreadContext * tc) {}; + void invoke(ThreadContext * tc, + StaticInst::StaticInstPtr inst = StaticInst::nullStaticInstPtr) + {} void setExceptionState(ThreadContext *, uint8_t); void setHandlerPC(Addr, ThreadContext *); #endif @@ -111,7 +113,8 @@ class AddressErrorFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -127,7 +130,8 @@ class StoreAddressErrorFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -155,7 +159,8 @@ class TLBRefillIFetchFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class TLBInvalidIFetchFault : public MipsFault @@ -169,7 +174,8 @@ class TLBInvalidIFetchFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class NDtbMissFault : public MipsFault @@ -231,7 +237,8 @@ class CacheErrorFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; @@ -257,7 +264,8 @@ class ResetFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; @@ -271,7 +279,8 @@ class SystemCallFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class SoftResetFault : public MipsFault @@ -284,7 +293,8 @@ class SoftResetFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class DebugSingleStep : public MipsFault @@ -297,7 +307,8 @@ class DebugSingleStep : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class DebugInterrupt : public MipsFault @@ -310,7 +321,8 @@ class DebugInterrupt : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class CoprocessorUnusableFault : public MipsFault @@ -324,7 +336,8 @@ class CoprocessorUnusableFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); CoprocessorUnusableFault(int _procid){ coProcID = _procid;} }; @@ -338,7 +351,8 @@ class ReservedInstructionFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class ThreadFault : public MipsFault @@ -351,7 +365,8 @@ class ThreadFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; class ArithmeticFault : public MipsFault @@ -367,7 +382,8 @@ class ArithmeticFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -385,7 +401,8 @@ class InterruptFault : public MipsFault FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -400,7 +417,8 @@ class TrapFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -415,7 +433,8 @@ class BreakpointFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -430,7 +449,8 @@ class ItbRefillFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -445,7 +465,8 @@ class DtbRefillFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -460,7 +481,8 @@ class ItbPageFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -475,7 +497,8 @@ class ItbInvalidFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -490,7 +513,8 @@ class TLBModifiedFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); #endif }; @@ -505,7 +529,8 @@ class DtbInvalidFault : public MipsFault FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} #if FULL_SYSTEM - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInst::StaticInstPtr inst = nullStaticInstPtr); #endif }; @@ -567,7 +592,8 @@ class DspStateDisabledFault : public MipsFault FaultName name() const {return _name;} FaultVect vect() {return _vect;} FaultStat & countStat() {return _count;} - void invoke(ThreadContext * tc); + void invoke(ThreadContext * tc, + StaticInstPtr inst = StaticInst::nullStaticInstPtr); }; } // MipsISA namespace diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh index 3f7afcdd0..6adf6bddc 100644 --- a/src/arch/mips/isa.hh +++ b/src/arch/mips/isa.hh @@ -38,7 +38,7 @@ #include "arch/mips/registers.hh" #include "arch/mips/types.hh" #include "sim/eventq.hh" -#include "sim/faults.hh" +#include "sim/fault.hh" class BaseCPU; class Checkpoint; diff --git a/src/arch/mips/tlb.hh b/src/arch/mips/tlb.hh index e301cf666..cb2e434cb 100644 --- a/src/arch/mips/tlb.hh +++ b/src/arch/mips/tlb.hh @@ -44,7 +44,7 @@ #include "base/statistics.hh" #include "mem/request.hh" #include "params/MipsTLB.hh" -#include "sim/faults.hh" +#include "sim/fault.hh" #include "sim/tlb.hh" #include "sim/sim_object.hh" diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc index ac90ce45e..ab6a00af3 100644 --- a/src/arch/mips/utility.cc +++ b/src/arch/mips/utility.cc @@ -28,6 +28,8 @@ * Authors: Korey Sewell */ +#include <cmath> + #include "arch/mips/isa_traits.hh" #include "arch/mips/utility.hh" #include "config/full_system.hh" |