diff options
Diffstat (limited to 'src/arch/mips')
| -rw-r--r-- | src/arch/mips/isa/formats/fp.isa | 6 | ||||
| -rw-r--r-- | src/arch/mips/mmaped_ipr.hh | 3 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/arch/mips/isa/formats/fp.isa b/src/arch/mips/isa/formats/fp.isa index cdb892b3f..153f3f949 100644 --- a/src/arch/mips/isa/formats/fp.isa +++ b/src/arch/mips/isa/formats/fp.isa @@ -99,7 +99,7 @@ output exec {{ int size = sizeof(src_op) * 8; for (int i = 0; i < inst->numSrcRegs(); i++) { - uint64_t src_bits = xc->readFloatRegBits(inst, 0, size); + uint64_t src_bits = xc->readFloatRegOperandBits(inst, 0, size); if (isNan(&src_bits, size) ) { if (isSnan(&src_bits, size)) { @@ -113,7 +113,7 @@ output exec {{ mips_nan = src_bits; } - xc->setFloatRegBits(inst, 0, mips_nan, size); + xc->setFloatRegOperandBits(inst, 0, mips_nan, size); if (traceData) { traceData->setData(mips_nan); } return true; } @@ -139,7 +139,7 @@ output exec {{ } //Set value to QNAN - cpu->setFloatRegBits(inst, 0, mips_nan, size); + cpu->setFloatRegOperandBits(inst, 0, mips_nan, size); //Read FCSR from FloatRegFile uint32_t fcsr_bits = cpu->tcBase()->readFloatRegBits(FCSR); diff --git a/src/arch/mips/mmaped_ipr.hh b/src/arch/mips/mmaped_ipr.hh index 041c76fdc..fa82a645c 100644 --- a/src/arch/mips/mmaped_ipr.hh +++ b/src/arch/mips/mmaped_ipr.hh @@ -37,8 +37,10 @@ * ISA-specific helper functions for memory mapped IPR accesses. */ +#include "base/misc.hh" #include "mem/packet.hh" +class ThreadContext; namespace MipsISA { @@ -48,7 +50,6 @@ handleIprRead(ThreadContext *xc, Packet *pkt) panic("No implementation for handleIprRead in MIPS\n"); } - inline Tick handleIprWrite(ThreadContext *xc, Packet *pkt) { |