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-rwxr-xr-xsrc/arch/mips/BISystem.py5
-rw-r--r--src/arch/mips/MipsCPU.py5
-rw-r--r--src/arch/mips/MipsSystem.py6
3 files changed, 9 insertions, 7 deletions
diff --git a/src/arch/mips/BISystem.py b/src/arch/mips/BISystem.py
index dd4e4fe25..a6e4091f2 100755
--- a/src/arch/mips/BISystem.py
+++ b/src/arch/mips/BISystem.py
@@ -28,10 +28,11 @@
#
# Authors: Jaidev Patwardhan
-from m5 import build_env
+from m5.defines import buildEnv
+
from System import *
-if build_env['FULL_SYSTEM']:
+if buildEnv['FULL_SYSTEM']:
class BareIronMipsSystem(MipsSystem):
type = 'BareIronMipsSystem'
system_type = 34
diff --git a/src/arch/mips/MipsCPU.py b/src/arch/mips/MipsCPU.py
index 81c6bdacf..48ee4171c 100644
--- a/src/arch/mips/MipsCPU.py
+++ b/src/arch/mips/MipsCPU.py
@@ -29,12 +29,13 @@
# Authors: Jaidev Patwardhan
# Korey Sewell
-from m5.SimObject import SimObject
+from m5.defines import buildEnv
from m5.params import *
+
from BaseCPU import BaseCPU
class BaseMipsCPU(BaseCPU)
- if build_env['TARGET_ISA'] == 'mips':
+ if buildEnv['TARGET_ISA'] == 'mips':
CP0_IntCtl_IPTI = Param.Unsigned(0,"No Description")
CP0_IntCtl_IPPCI = Param.Unsigned(0,"No Description")
CP0_SrsCtl_HSS = Param.Unsigned(0,"No Description")
diff --git a/src/arch/mips/MipsSystem.py b/src/arch/mips/MipsSystem.py
index c3dcf4e0b..d271bd387 100644
--- a/src/arch/mips/MipsSystem.py
+++ b/src/arch/mips/MipsSystem.py
@@ -28,10 +28,10 @@
#
# Authors: Jaidev Patwardhan
-from m5.SimObject import SimObject
+from m5.defines import buildEnv
from m5.params import *
from m5.proxy import *
-from m5 import build_env
+
from System import System
class MipsSystem(System):
@@ -42,7 +42,7 @@ class MipsSystem(System):
system_type = Param.UInt64("Type of system we are emulating")
system_rev = Param.UInt64("Revision of system we are emulating")
-if build_env['FULL_SYSTEM']:
+if buildEnv['FULL_SYSTEM']:
class LinuxMipsSystem(MipsSystem):
type = 'LinuxMipsSystem'
system_type = 34