diff options
Diffstat (limited to 'src/arch/mips')
| -rw-r--r-- | src/arch/mips/faults.hh | 2 | ||||
| -rw-r--r-- | src/arch/mips/isa/decoder.isa | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/mips/faults.hh b/src/arch/mips/faults.hh index d843acc50..1ec726d17 100644 --- a/src/arch/mips/faults.hh +++ b/src/arch/mips/faults.hh @@ -45,7 +45,7 @@ namespace MipsISA { -typedef const Addr FaultVect; +typedef Addr FaultVect; enum ExcCode { // A dummy value to use when the code isn't defined or doesn't matter. diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa index a62dbb7bb..52cbc4041 100644 --- a/src/arch/mips/isa/decoder.isa +++ b/src/arch/mips/isa/decoder.isa @@ -2404,7 +2404,7 @@ decode OPCODE_HI default Unknown::unknown() { 0x3: decode OP_LO { format DspHiLoOp { 0x2: shilo({{ - if (sext<6>(HILOSA) < 0) { + if ((int64_t)sext<6>(HILOSA) < 0) { dspac = (uint64_t)dspac << -sext<6>(HILOSA); } else { @@ -2413,7 +2413,7 @@ decode OPCODE_HI default Unknown::unknown() { } }}); 0x3: shilov({{ - if (sext<6>(Rs_sw<5:0>) < 0) { + if ((int64_t)sext<6>(Rs_sw<5:0>) < 0) { dspac = (uint64_t)dspac << -sext<6>(Rs_sw<5:0>); } else { |