diff options
Diffstat (limited to 'src/arch/mips')
| -rw-r--r-- | src/arch/mips/MipsInterrupts.py | 1 | ||||
| -rw-r--r-- | src/arch/mips/MipsSystem.py | 3 | ||||
| -rw-r--r-- | src/arch/mips/MipsTLB.py | 1 |
3 files changed, 5 insertions, 0 deletions
diff --git a/src/arch/mips/MipsInterrupts.py b/src/arch/mips/MipsInterrupts.py index 06cd54263..9cde5daef 100644 --- a/src/arch/mips/MipsInterrupts.py +++ b/src/arch/mips/MipsInterrupts.py @@ -31,3 +31,4 @@ from m5.SimObject import SimObject class MipsInterrupts(SimObject): type = 'MipsInterrupts' cxx_class = 'MipsISA::Interrupts' + cxx_header = 'arch/mips/interrupts.hh' diff --git a/src/arch/mips/MipsSystem.py b/src/arch/mips/MipsSystem.py index 4a0851eba..c6ceb71db 100644 --- a/src/arch/mips/MipsSystem.py +++ b/src/arch/mips/MipsSystem.py @@ -36,6 +36,7 @@ from System import System class MipsSystem(System): type = 'MipsSystem' + cxx_header = 'arch/mips/system.hh' console = Param.String("file that contains the console code") bare_iron = Param.Bool(False, "Using Bare Iron Mode?") hex_file_name = Param.String("test.hex","hex file that contains [address,data] pairs") @@ -45,6 +46,7 @@ class MipsSystem(System): class LinuxMipsSystem(MipsSystem): type = 'LinuxMipsSystem' + cxx_header = 'arch/mips/linux/system.hh' system_type = 34 system_rev = 1 << 10 @@ -53,6 +55,7 @@ class LinuxMipsSystem(MipsSystem): class BareIronMipsSystem(MipsSystem): type = 'BareIronMipsSystem' + cxx_header = 'arch/mips/bare_iron/system.hh' bare_iron = True system_type = 34 system_rev = 1 << 10 diff --git a/src/arch/mips/MipsTLB.py b/src/arch/mips/MipsTLB.py index 16cbe6879..c43cee717 100644 --- a/src/arch/mips/MipsTLB.py +++ b/src/arch/mips/MipsTLB.py @@ -37,4 +37,5 @@ from BaseTLB import BaseTLB class MipsTLB(BaseTLB): type = 'MipsTLB' cxx_class = 'MipsISA::TLB' + cxx_header = 'arch/mips/tlb.hh' size = Param.Int(64, "TLB size") |