summaryrefslogtreecommitdiff
path: root/src/arch/mips
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/mips')
-rwxr-xr-xsrc/arch/mips/mips_core_specific.cc5
-rw-r--r--src/arch/mips/mips_core_specific.hh7
-rw-r--r--src/arch/mips/utility.hh24
3 files changed, 0 insertions, 36 deletions
diff --git a/src/arch/mips/mips_core_specific.cc b/src/arch/mips/mips_core_specific.cc
index 14f4186e3..31d47c842 100755
--- a/src/arch/mips/mips_core_specific.cc
+++ b/src/arch/mips/mips_core_specific.cc
@@ -43,9 +43,4 @@ void
MipsISA::initCPU(ThreadContext *tc, int cpuId)
{}
-template <class CPU>
-void
-MipsISA::processInterrupts(CPU *cpu)
-{}
-
#endif // FULL_SYSTEM || BARE_IRON
diff --git a/src/arch/mips/mips_core_specific.hh b/src/arch/mips/mips_core_specific.hh
index 0d19bf944..bd66e049f 100644
--- a/src/arch/mips/mips_core_specific.hh
+++ b/src/arch/mips/mips_core_specific.hh
@@ -37,13 +37,6 @@ class ThreadContext;
namespace MipsISA {
void initCPU(ThreadContext *tc, int cpuId);
-
- /**
- * Function to check for and process any interrupts.
- * @param tc The thread context.
- */
- template <class CPU>
- void processInterrupts(CPU *cpu);
};
#endif // __ARCH_MIPS_CORE_SPECIFIC_HH__
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 1e58238e9..f827e9b33 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -79,30 +79,6 @@ inUserMode(ThreadContext *tc)
}
}
-// Instruction address compression hooks
-static inline Addr realPCToFetchPC(const Addr &addr) {
- return addr;
-}
-
-static inline Addr fetchPCToRealPC(const Addr &addr) {
- return addr;
-}
-
-// the size of "fetched" instructions (not necessarily the size
-// of real instructions for PISA)
-static inline size_t fetchInstSize() {
- return sizeof(MachInst);
-}
-
-////////////////////////////////////////////////////////////////////////
-//
-// Register File Utility Functions
-//
-static inline MachInst makeRegisterCopy(int dest, int src) {
- panic("makeRegisterCopy not implemented");
- return 0;
-}
-
template <class CPU>
void zeroRegisters(CPU *cpu);