diff options
Diffstat (limited to 'src/arch/mips')
| -rwxr-xr-x | src/arch/mips/mips_core_specific.cc | 4 | ||||
| -rwxr-xr-x | src/arch/mips/system.cc | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/mips/mips_core_specific.cc b/src/arch/mips/mips_core_specific.cc index a17ebcdf3..80d856b0c 100755 --- a/src/arch/mips/mips_core_specific.cc +++ b/src/arch/mips/mips_core_specific.cc @@ -113,13 +113,13 @@ MipsISA::processInterrupts(CPU *cpu) /*int MipsISA::MiscRegFile::getInstAsid() { - return EV5::ITB_ASN_ASN(ipr[IPR_ITB_ASN]); + return AlphaISA::ITB_ASN_ASN(ipr[IPR_ITB_ASN]); } int MipsISA::MiscRegFile::getDataAsid() { - return EV5::DTB_ASN_ASN(ipr[IPR_DTB_ASN]); + return AlphaISA::DTB_ASN_ASN(ipr[IPR_DTB_ASN]); }*/ diff --git a/src/arch/mips/system.cc b/src/arch/mips/system.cc index bf86bb030..73bc33161 100755 --- a/src/arch/mips/system.cc +++ b/src/arch/mips/system.cc @@ -185,7 +185,7 @@ MipsSystem::setMipsAccess(Addr access) { Addr addr = 0; if (consoleSymtab->findAddress("m5MipsAccess", addr)) { - // virtPort.write(addr, htog(EV5::Phys2K0Seg(access))); + // virtPort.write(addr, htog(AlphaISA::Phys2K0Seg(access))); } else panic("could not find m5MipsAccess\n"); } |