diff options
Diffstat (limited to 'src/arch/mips')
| -rw-r--r-- | src/arch/mips/isa.cc | 4 | ||||
| -rw-r--r-- | src/arch/mips/isa.hh | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/mips/isa.cc b/src/arch/mips/isa.cc index 164f10d5d..a37f523d9 100644 --- a/src/arch/mips/isa.cc +++ b/src/arch/mips/isa.cc @@ -410,14 +410,14 @@ ISA::configCP() } inline unsigned -ISA::getVPENum(ThreadID tid) +ISA::getVPENum(ThreadID tid) const { TCBindReg tcBind = miscRegFile[MISCREG_TC_BIND][tid]; return tcBind.curVPE; } MiscReg -ISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) +ISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) const { unsigned reg_sel = (bankType[misc_reg] == perThreadContext) ? tid : getVPENum(tid); diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh index fea3f00ca..feb55e473 100644 --- a/src/arch/mips/isa.hh +++ b/src/arch/mips/isa.hh @@ -76,7 +76,7 @@ namespace MipsISA void configCP(); - unsigned getVPENum(ThreadID tid); + unsigned getVPENum(ThreadID tid) const; ////////////////////////////////////////////////////////// // @@ -87,7 +87,7 @@ namespace MipsISA //@TODO: MIPS MT's register view automatically connects // Status to TCStatus depending on current thread void updateCP0ReadView(int misc_reg, ThreadID tid) { } - MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0); + MiscReg readMiscRegNoEffect(int misc_reg, ThreadID tid = 0) const; //template <class TC> MiscReg readMiscReg(int misc_reg, |