diff options
Diffstat (limited to 'src/arch/mips')
-rw-r--r-- | src/arch/mips/MipsInterrupts.py | 33 | ||||
-rw-r--r-- | src/arch/mips/SConscript | 1 |
2 files changed, 34 insertions, 0 deletions
diff --git a/src/arch/mips/MipsInterrupts.py b/src/arch/mips/MipsInterrupts.py new file mode 100644 index 000000000..06cd54263 --- /dev/null +++ b/src/arch/mips/MipsInterrupts.py @@ -0,0 +1,33 @@ +# Copyright (c) 2008 The Regents of The University of Michigan +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Gabe Black + +from m5.SimObject import SimObject + +class MipsInterrupts(SimObject): + type = 'MipsInterrupts' + cxx_class = 'MipsISA::Interrupts' diff --git a/src/arch/mips/SConscript b/src/arch/mips/SConscript index 844e7ba15..0368e68bc 100644 --- a/src/arch/mips/SConscript +++ b/src/arch/mips/SConscript @@ -51,6 +51,7 @@ if env['TARGET_ISA'] == 'mips': if env['FULL_SYSTEM']: SimObject('MipsSystem.py') + SimObject('MipsInterrupts.py') Source('idle_event.cc') Source('mips_core_specific.cc') Source('vtophys.cc') |