summaryrefslogtreecommitdiff
path: root/src/arch/mips
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/isa/decoder.isa6
-rw-r--r--src/arch/mips/linux/linux.hh4
-rw-r--r--src/arch/mips/linux/process.cc2
-rwxr-xr-xsrc/arch/mips/pagetable.hh2
4 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa
index 52cbc4041..1f930f3f5 100644
--- a/src/arch/mips/isa/decoder.isa
+++ b/src/arch/mips/isa/decoder.isa
@@ -359,7 +359,7 @@ decode OPCODE_HI default Unknown::unknown() {
Rt &= 0xFFFFE7FF;
}
}});
- 0x4: mtc0({{
+ 0x4: mtc0({{
CP0_RD_SEL = Rt;
CauseReg cause = Cause;
IntCtlReg intCtl = IntCtl;
@@ -1238,7 +1238,7 @@ decode OPCODE_HI default Unknown::unknown() {
0x3: CP1Unimpl::unknown();
0x7: CP1Unimpl::unknown();
- //Table A-16 MIPS32 COP1 Encoding of Function
+ //Table A-16 MIPS32 COP1 Encoding of Function
//Field When rs=W
0x4: decode FUNCTION {
format FloatConvertOp {
@@ -1867,7 +1867,7 @@ decode OPCODE_HI default Unknown::unknown() {
}});
0x7: precr_sra_r_ph_w({{
Rt_uw = dspPrecrSra(Rt_uw, Rs_uw, RD,
- SIMD_FMT_W, ROUND);
+ SIMD_FMT_W, ROUND);
}});
}
}
diff --git a/src/arch/mips/linux/linux.hh b/src/arch/mips/linux/linux.hh
index 992bbf85d..38f958c89 100644
--- a/src/arch/mips/linux/linux.hh
+++ b/src/arch/mips/linux/linux.hh
@@ -125,7 +125,7 @@ class MipsLinux : public Linux
/// assign themselves to process IDs reserved for
/// the root users.
static const int NUM_ROOT_PROCS = 2;
-
+
typedef struct {
int32_t uptime; /* Seconds since boot */
uint32_t loads[3]; /* 1, 5, and 15 minute load averages */
@@ -140,7 +140,7 @@ class MipsLinux : public Linux
uint32_t freehigh; /* Available high memory size */
uint32_t mem_unit; /* Memory unit size in bytes */
} tgt_sysinfo;
-
+
};
#endif
diff --git a/src/arch/mips/linux/process.cc b/src/arch/mips/linux/process.cc
index ef21179e5..c6c40188e 100644
--- a/src/arch/mips/linux/process.cc
+++ b/src/arch/mips/linux/process.cc
@@ -77,7 +77,7 @@ sys_getsysinfoFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
switch (op) {
case 45:
- {
+ {
// GSI_IEEE_FP_CONTROL
TypedBufferArg<uint64_t> fpcr(bufPtr);
// I don't think this exactly matches the HW FPCR
diff --git a/src/arch/mips/pagetable.hh b/src/arch/mips/pagetable.hh
index cc4e4a859..cb129fba7 100755
--- a/src/arch/mips/pagetable.hh
+++ b/src/arch/mips/pagetable.hh
@@ -65,7 +65,7 @@ struct PTE
bool V1; // Odd entry Valid Bit
uint8_t C1; // Cache Coherency Bits (3 bits)
- /*
+ /*
* The next few variables are put in as optimizations to reduce
* TLB lookup overheads. For a given Mask, what is the address shift
* amount, and what is the OffsetMask